Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
1999-11-30
2001-03-20
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S118000, C438S613000
Reexamination Certificate
active
06204090
ABSTRACT:
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH
Not Applicable.
REFERENCE TO MICROFICHE APPENDIX
Not Applicable.
BACKGROUND OF THE INVENTION
This invention relates to integrated circuit (IC) or semiconductor die assemblies and, more particularly, to an assembly comprising an IC die mounted to a substrate or carrier and method for making the same. The semiconductor die assembly is acceptable for use in ultra-high vacuum and high temperature environments.
Integrated circuit devices are typically fabricated from semiconductor or silicon dies that are mounted in modules that can include supporting carriers or substrates and headers. In applications where the IC die is fragile or subject to further processing, the IC die can be mounted to a substrate or carrier to provide further support or facilitate further processing. Typically, the carriers or substrates are subsequently mounted to a header which includes pins or other leads which allow the device to be electrically and mechanically connected to the system in which it is to be used. The header can facilitate mounting the IC module to a circuit board, a mating socket or module housing or enclosure. Typically, fine gold wires are bonded to conductive pads on the die or the carrier and the header to establish electrical connections between the pins or leads of the header and the integrated circuit on the die.
In certain circumstances, it may be necessary to reduce the thickness of the die such as in the preparation of backside illumination charged coupled devices (CCDs). In the prior art, there are two methods of producing reduced thickness or “thinned” dies. One method includes ball bonding the die to a substrate to provide electrical connections between the die and the substrate and flowing an organic material between the die and the substrate to provide mechanical support for the die. After the organic material has set, the die can be thinned by a mechanical process such as lapping or a chemical process such as etching. The other method involves forming a glass or ceramic substrate onto the die at the wafer level. After the substrate is formed on the wafer, the die is thinned to the desired thickness and predefined areas of the die are removed to expose conductive pads which are bonded to the substrate.
The carrier assembly with the thinned die is subsequently mounted to a header which provides an array of pins or other means for electrically connecting the integrated circuit die to the remainder of the circuit. Typically, the header includes conductive pads which are electrically connected to the array of pins. Wire bonding is used to connect the conductive pads of the die to the conductive pads of the header.
These prior art methods are not acceptable for mounting back illumination electron bombarded charged coupled devices (EBCCDs). The use of organic materials for die attachment is not acceptable for use in ultrahigh vacuum environments because these materials outgas at levels which degrade the vacuum and reduce the EBCCD tube life. In addition, the temperature necessary to bake out the organic materials to reduce outgassing, would damage the integrated circuit die. In the alternate method, glass having a coefficient of thermal expansion close to that of the die is cast as a substrate or carrier to the integrated circuit wafer. However, the processing temperatures required to fabricate the substrate on the wafer are higher than normal temperatures that are not acceptable for processing integrated circuit dies that use traditional metallurgies. In order to fabricate the IC die carrier assembly at high temperatures (800-900 degrees C.), the die must be fabricated from refractory metals which have a higher resistivity and thus yield slower operating speeds. In addition, the die must be specifically designed to allow etching from the backside to expose the conductive pad. Furthermore, at these high processing temperatures, stresses created by the different coefficients of thermal expansion of the die, the carrier and the material that attaches the die to the carrier can cause the die or the electrical connections of the die to the carrier to fail prematurely. Still further, the stresses created by the different coefficients of thermal expansion between the header and the carrier can also cause the device to fail prematurely.
Accordingly, it is an object of this invention to provide an improved circuit device.
It is another object of the invention to provide an improved circuit device that is suitable for use in ultrahigh vacuum environments.
It is yet another object of the invention to provide an improved circuit device that is suitable for processing and use in higher temperature environments.
It is a further object of the invention to provide an improved circuit device comprising an integrated circuit die mounted to a carrier wherein thermal coefficients of expansion of the die and the carrier are relatively close to reduce the stress associated with thermal expansion of different materials having different expansion coefficients and the layer of material binding the die to the carrier is relatively thin whereby its coefficient of thermal expansion does not detrimentally impact the IC die carrier assembly.
It is a further object of the invention to provide an improved method of mounting an integrated circuit die to a carrier or substrate.
It is a further object of the invention to provide an improved method of mounting a electron bombarded charged coupled device (EBCCD) to a carrier in order to permit the EBCCD to be thinned.
SUMMARY OF THE INVENTION
The present invention is directed integrated circuit devices such as those fabricated using silicon and other semiconducting materials in wafers. In accordance with the invention, the integrated circuit device includes an IC die which has conductive pads for establishing connections with the circuit contained therein and a carrier or substrate to which the integrated circuit die is mounted. The carrier can also include conductive pads to facilitate electrical connections with the IC. In order to effect mechanical attachment of the IC die to the carrier, a mounting material is applied between the die and carrier. In order to effect electrical connections between the conductive pads on the die and conductive pads on the carrier, one or more conducting elements can be used.
The mounting material is applied as an adhesive layer between the IC die and the carrier. Preferably, the mounting material is an inorganic material having a predefined or controlled density. In one embodiment the mounting material includes a glass powder or frit. The glass frit can be reflowed or at least partially sintered in order to fill the space between the IC die and the carrier. The carrier is selected such that the coefficient of thermal expansion of the carrier material is compatible with the thermal expansion characteristics of the die to avoid stress concentrations and failure. Preferably, the coefficient of thermal expansion of the carrier material is selected to be as close to the coefficient of thermal expansion of the IC die as possible. In addition, the thickness of the layer of the mounting material is kept to a minimum in order to prevent the thermal expansion characteristics of the mounting material from affecting the IC die carrier assembly.
The conducting elements connect the conductive pads of the IC die to the conductive pads of the carrier. The IC die carrier assembly can be subsequently attached to a header assembly and the conductive pads of the carrier can be connected to conductive pads or leads on the header to facilitate electrical connection to the IC. In one embodiment, the conducting elements include ball bonds which include balls of a metallic material that are compressed into place between the conductive pads of IC die and the conductive pads of the carrier. In an alternative embodiment, wire bonds which include fine wires bonded to conductive pads of the IC die and the carrier. In a third embodiment, a thin or thick film of a conductive material is applied to the surfaces of
Boyle John J.
Robbins William L.
Chambliss Alonzo
Chaudhuri Olik
McDermott & Will & Emery
The Charles Stark Draper Laboratory Inc.
LandOfFree
Method for attaching a die to a carrier utilizing an... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for attaching a die to a carrier utilizing an..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for attaching a die to a carrier utilizing an... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2533866