Static information storage and retrieval – Floating gate – Particular connection
Patent
1995-09-06
1996-08-06
Nguyen, Viet Q.
Static information storage and retrieval
Floating gate
Particular connection
365201, 36518529, 36518530, 36518533, 371 216, G11C 1700, H01L 2710
Patent
active
055441190
ABSTRACT:
A method for insuring that an erase operation practiced on a block of flash EEPROM transistors is carried out reliably including the steps of: writing whenever the erasure of a block of the flash EEPROM array is to commence to a position in the array to indicate that an erasure of the block has commenced, writing whenever the erasure of a block of the flash EEPROM array is complete to the position in the array to indicate that an erasure of the block has been completed, testing to determine any positions in the array which indicate that an erasure of a block has commenced but not been completed upon applying power to the flash EEPROM array, and reinitiating an erase if any positions in the array exist which indicate that an erasure of a block has commenced but not been completed.
REFERENCES:
patent: 4279024 (1981-07-01), Schrenk
patent: 4642759 (1987-02-01), Foster
patent: 4644494 (1987-02-01), Muller
patent: 4718041 (1988-01-01), Baglee et al.
patent: 4763305 (1988-08-01), Kuo
patent: 4802117 (1989-01-01), Chrosny et al.
patent: 4896262 (1990-01-01), Wayama et al.
patent: 4958315 (1990-09-01), Balch
patent: 5012425 (1991-04-01), Brown
patent: 5101490 (1992-03-01), Getson, Jr. et al.
patent: 5111385 (1992-05-01), Hattori
patent: 5131089 (1992-07-01), Cole
patent: 5199033 (1993-03-01), McGeoch et al.
patent: 5200959 (1993-04-01), Gross et al.
patent: 5224070 (1993-06-01), Fandrich et al.
patent: 5268870 (1993-12-01), Harari
patent: 5341339 (1994-08-01), Wells
patent: 5357475 (1994-10-01), Hasbun et al.
patent: 5369616 (1994-11-01), Wells et al.
Stephen J. Gross et al., "Solid-State Mass Storage Arrives," Product Feature, Memory Card Systems & Design, 4 pages(Jul./Aug. 1992).
Magnusson Eric J.
Wells Steven E.
Intel Corporation
Nguyen Viet Q.
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