Method for assembling, testing, and packaging integrated circuit

Details Method for assembling, testing, and packaging integrated circuit Method for assembling, testing, and packaging integrated circuit

1989-11-03

1991-01-22

Echols, P. W.

Metal working

Method of mechanical manufacture

Electrical device making

174 522._, 206328, 206330, 324158R, 437217, 437220, H01R 4300

Patent

active

049859889

ABSTRACT:
An assembly flow in which integrated circuits are burned-in and parametrically tested before assembly is provided. The integrated circuits are sorted based on the results of the parametric testing, and assembled in groups with similar parameters. Integrated circuits from a single group are assembled on a leadframe and encapsulated, marked, and tested again while still attached to the leadframe. Finally, the packaged integrated circuits are separated from the leadframe and those meeting predetermined parameters are loaded into carrier sleeves.

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patent: 4799021 (1989-01-01), Cozzi

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