Boots – shoes – and leggings
Patent
1996-01-26
1999-03-23
Butler, Dennis M.
Boots, shoes, and leggings
395559, G06F 1500
Patent
active
058868992
ABSTRACT:
A method for analyzing the performance of a logic circuit driven by a clock signal, such as a microprocessor, identifies a number of operations of interest in a logic circuit and represents the presence of each of such operations by a different symbol. One or more of these symbols are output for perusal at the end of each clock period of operation. In one embodiment, this method is applied to a register transfer level (RTL) simulation of an execution unit of a microprocessor. In that embodiment, the execution sequence of multiple instructions executing simultaneously in the execution unit was analyzed. Because each output symbol represents a summary of a large number of activities that occur in a single clock period of operation or simulation of a complex logic circuit, these symbols can be tabulated in a format that allows a designer of the complex logic circuit to easily spot an unexpected pattern of operation, or an error condition.
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Nagasamy et al., "Specification, Planning, and Synthesis in a VHDL Design Environment", 1992, pp. 58-68.
Advanced Micro Devices
Butler Dennis M.
Kwok Edward C.
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