Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2002-10-21
2004-03-23
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C438S666000, C438S668000, C438S975000
Reexamination Certificate
active
06709949
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a method for aligning structures on the front side of a substrate and on the rear side of the substrate.
In the three-dimensional integration of integrated circuits, a thinned semiconductor substrate is arranged on a second semiconductor substrate and is mechanically and electrically connected thereto. This method is described, for example, in “Vertically Integrated Circuits—A Key Technology for Future High Performance Systems”, M. Engelhardt et. al. from CIP '97 Proceedings, Proc. 11
th
International Colloquium on Plasma Processes, page 187 (1997), and Supplément à la Revue Le Vide: science, technique et applications; No 284, April-May-June 1997, Editor: Société Francaise du Vide, 19 rue du Renard, 75004 Paris, France, on pages 187 to 192 (Supplementary Article to Revue Le Vide: Science, Techniques and Applications). In the method, the alignment and contact-connection of the semiconductor substrate is one of the technologically most demanding and most difficult process steps.
For the three-dimensional integration, it is customary first to provide two wafers having circuit sections that have already been processed. In this case, the first wafer serves as a carrier and the second wafer is thinned by the following method and is arranged on the first wafer. For thinning, first the front side of the second wafer is provided with an adhesive layer, and is connected to a mounting carrier. The front side is the side having the electrical circuits. The second wafer is then thinned from its rear side. In addition, contact hole openings are formed through the thinned substrate from the rear side as far as the first metal plane on the front side of the thinned wafer. Aligning the contact holes with respect to the contacts on the front side of the thinned substrate cannot be effected using the front side of the thinned substrate since the front side is concealed by the mounting carrier.
Therefore, the rear side of the second wafer is conventionally exposed using contact lithography. The alignment is effected using infrared exposure on marks that are arranged on the front side of the thinned wafer. In this case, the contact exposure, and particularly the infrared contact exposure, causes a large alignment error of typically +/−5 &mgr;m. Therefore, the contact regions on the front side of the thinned substrate are usually made very large. This means that valuable space on the front side of the substrate, which contains the electrical circuits, for example, is occupied by the large contacts.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method for aligning structures on a substrate front side and a substrate rear side which overcomes the above-mentioned disadvantages of the prior art methods of this general type.
In particular, it is an object of the invention to provide a method for aligning structures on a substrate front side and a substrate rear side which enables a significantly smaller alignment error.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for aligning structures on the front side of a substrate and on the rear side of the substrate, which is opposite the front side of the substrate. The method includes steps of: forming a structure on the front side of the substrate; overgrowing the structure with a useful layer; and uncovering the structure, proceeding from the rear side of the substrate.
The method includes first forming a structure on the front side of the substrate. Afterward, by way of example, further layers can be formed on the front side of the substrate. By way of example, electrical components and circuits are formed in the further layers. In this case, the structure on the front side of the substrate can be used for the alignment in a stepper, which carries out the exposure of a photoresist on the substrate front side. By way of example, by etching the rear side of the substrate, the structure which is used for patterning the substrate front side is uncovered on the substrate rear side, so that it can also be used on the substrate rear side as an alignment mark for a stepper in order to expose a photoresist on the substrate rear side for the processing of the substrate rear side. Since the structure is suitable for being used by a stepper, a contact exposure, which has a high alignment error, is no longer necessary. Equally, it is possible to dispense with the infrared exposure through the thinned wafer, which likewise reduces the alignment error.
One method step includes an alignment step using the structure uncovered on the rear side as an alignment mark. This advantageously enables the use of a stepper exposure instead of an infrared contact exposure, as a result of which the alignment error can be significantly reduced.
A further method step includes an alignment step using the structure on the front side of the substrate as an alignment mark. The advantage of this method step is that both the structures formed on the substrate front side and the structures formed on the substrate rear side can be aligned with the same structure. As a result, it is possible to avoid a misalignment between the process and exposure steps carried out on the substrate front side and the process and exposure steps carried out on the substrate rear side.
A further method step includes using the structure as an etching mask while etching the rear side. The use of the structure as an etching mask advantageously makes it possible to carry out a self-aligned etching process on the substrate rear side.
One method variant includes forming the structure as a trench in the front side of the substrate. The advantage of this configuration is that a trench in a substrate surface can be used as an alignment mark by a stepper.
A further method variant includes forming the structure as an elevation on the front side of the substrate. An elevation on the substrate front side is suitable for serving as an alignment mark for a stepper. In this case, the elevation can be formed from the same material as the substrate or else from a different material.
If the structure is formed from a different material than the substrate, then the different material can be sunk in the substrate front side and the substrate surface can be planarized.
Furthermore, a doped layer can be formed in the substrate. In this case, the doped layer has the task of serving as an etching stop during the etching of the substrate rear side. The doped layer is advantageously formed in such a way that it acquires the topographic contour of the structure. As a result, it is possible for both the processing on the substrate front side and the processing on the substrate rear side to be aligned with the same structure.
Furthermore, the rear side of the substrate can be etched chemically, during which the substrate is thinned, the doped layer is used as an etching stop, and the structure is formed on the rear side.
In a further method variant, in addition to the structure that is uncovered on the rear side a second trench is formed, which is filled with a mask material. The advantage of this method step is that a mask material can be arranged in a self-aligned manner with respect to the structure formed on the rear side without additional photolithographic exposure steps. The mask material can be used as an etching mask in a subsequent etching step.
In a further method step, the second trench is filled with the mask material by depositing the mask material on the rear side of the substrate and then planarizing. This method step has the advantage that the mask material is introduced into the second trench and forms a self-aligned etching mask, without requiring an additional lithographic exposure step.
A further method step includes using the mask material as an etching mask during the patterning of the rear side. This process step makes it possible, by way of example, to etch contact holes from the substrate rear side to the substrate front si
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Picardat Kevin M.
Stemer Werner H.
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