Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Compound semiconductor
Reexamination Certificate
2001-09-07
2004-02-24
Crane, Sara (Department: 2811)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Compound semiconductor
C438S758000, C438S938000, C438S962000, C257S015000, C257S018000
Reexamination Certificate
active
06696313
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device having quantum dots. More particularly, it relates to a method for aligning quantum dots so as to effectively control a growth position of quantum dots.
BACKGROUND OF THE INVENTION
Recently, quantum dots are a quantum structure having a freedom degree of a zero-dimension (0-D), and have various good characteristics. That is, when the quantum dots are applied to either an opto-electronic device such as a light emitting diode (LED), a laser diode (LD), and a photodetector, or an electronic device such as a single electronic transistor, a threshold current becomes lower, an optical gain becomes higher, and a temperature sensitivity becomes dull. Therefore, the elements applicable to the quantum dots have been used popularly as the next generation elements in these days.
As a technique for fabricating a semiconductor substrate having quantum dots using a natural phenomenon without an additional lithography, among a plurality of methods for forming quantum dots, Stanski-Krastanow (S-K) growth technique using a stress relaxation of a lattice mismatch layer has been widely developed. However, although quantum dots using such a lattice mismatch do not require a prior/post patterning process because of a spontaneous formation, it is difficult to control a size or position of the quantum dots because irregular quantum dots are randomly distributed on a substrate.
Except for the S-K growth technique, as a currently well-known technique for aligning quantum dots, a method for growing quantum dots on a patterned substrate having a ridge and tetrahedral pits, a method for growing quantum dots on a buffer layer having a multiatomic step formed on a vicinal substrate, and a method for growing quantum dots on GaAS <100> mesa surface formed on a patterned oxide layer were developed, where <100> means an alignment direction.
However, these methods may occur a damage caused by a dry etching in patterning the substrate, and a position and a width of a three-dimensional structure according to misorientation angle may be limited. And, the third method for growing quantum dots on GaAs <100> mesa surface formed on the patterned oxide layer has some difficulty in adjusting a position of quantum dots, and requires a compliex prior/post patterning process.
SUMMARY OF THE INVENTION
It is, therefore, an objective of the present invention to provide a method for effectively controlling a growth alignment of quantum dots without requiring a complex prior/post patterning process, and a semiconductor device fabricated by using the method.
In accordance with one aspect of the present invention, in order to achieve this objective, a method for fabricating a semiconductor device having quantum dots comprises the steps of: preparing a substrate; growing a superlattice strained layer by alternately depositing at least two semiconductor materials having different lattice constant by a predetermined cycle; and forming a quantum-dot active layer including quantum dots on the superlattice strained layer, where the quantum dots are aligned on the superlattice strained layer along an internal strain of the superlattice stained layer, wherein the internal strain is induced by the alternate deposition during the predetermined cycle, and the predetermined cycle is determined in consideration of the internal strain.
The two semiconductor materials are selected from a compound including at least one among In, Ga and Al. The compound of the two materials is based on In
x
Ga
1−x
As/GaAs, In
x
Ga
1−x
As/Al
y
Ga
1−y
As, In
x
Ga
1−x
P/InP, Al
y
Ga
1−y
P/InP, or In
x
Ga
1−x
As/InP, where each of x and y has a value of 0 to 1. The quantum-dot active layer is based on In
x
Ga
1−x
As, where x has a value of 0 to 1. The predetermined cycle is determined to make a thickness of the superlattice strained layer be thicker than a critical thickness inducing a lattice relaxation of the superlattice strained layer because of the internal strain. The predetermined cycle is determined to make the quantum dots on the quantum-dot active layer be aligned in one-dimension (1-D) or two-dimension (2-D). In the step for forming the quantum-dot active layer, the quantum dots are grown by alternately depositing a first material and a second material that have a different lattice constant from each other by at least one time, in order to make a distribution of the quantum dots be one-dimensional (1-D) alignment or two-dimensional (2-D) alignment. Prior to the step for forming the quantum-dot active layer, a buffering layer is deposited on the superlattice strained layer, for protecting a device to be mounted on the semiconductor device in post process.
In accordance with another aspect of the present invention, a semiconductor device having quantum dots comprises: a substrate; a superlattice strained layer formed on the substrate, in which at least two semiconductor materials having different lattice constant are alternately deposited by a predetermined cycle; and a quantum-dot active layer formed on the superlattice strained layer, including quantum dots aligned along an internal strain of the superlattice stained layer, wherein the internal strain is induced by the alternate deposition during the predetermined cycle, and the predetermined cycle is determined in consideration of the internal strain.
REFERENCES:
patent: 6507042 (2003-01-01), Mukai et al.
patent: 6541788 (2003-04-01), Petroff et al.
patent: 10-215032 (1998-08-01), None
Holy, V. et al. “Strain Induced Vertical and Lateral Correlations in Quantum Dot Superlattices,” Phys. Rev. Lett. vol. 83(2), pp. 356-359, Jul. 12, 1999.
Kim Eun Kyu
Kim Kwang Moo
Park Yong Ju
Crane Sara
Korea Institute of Science and Technology
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