Method for adjusting the phase-locking loop of an electronic...

Measuring and testing – Speed – velocity – or acceleration – Angular rate using gyroscopic or coriolis effect

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C310S319000

Reexamination Certificate

active

06672159

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method for balancing the phase-locked loop of an electronic analyzing device and an electronic analyzing device.
BACKGROUND OF THE INVENTION
Yaw rate sensors that utilize the Coriolis effect (so-called Coriolis vibratory gyros or abbreviated: CVGs) have an oscillating mass (sensor element) and an electronic analyzing circuit by which the deflection of the oscillating mass is determined based on the effect of an external yaw rate on the sensor. The electronic analyzing circuit is typically provided with a phase-locked loop (PLL) to obtain information concerning the phase position of path-proportional and velocity-proportional signals. Furthermore, the PLL synchronizes the signal processing with the sensor drive frequency.
The following is true of the Coriolis force F
C
:
F
C
=2
*m
* (
v
×&OHgr;)
where:
m: mass of the structure moved
v: velocity of the structure moved
&OHgr;: external yaw rate
The Coriolis force F
C
causes a deflection &Dgr;x in a CVG. The mechanical transfer function x/F of the CVG then causes this deflection &Dgr;x to undergo a phase shift &agr; when the quality of the mechanical system is not sufficiently high and the frequency difference between the working frequency and the resonance frequency of the detection mode is low.
To be able to measure a yaw rate, this signal is demodulated with an in-phase, velocity-proportional signal v_prop. CVGs exhibit interference signals that are not proportional to the velocity. Rather, these interference signals are in phase with the path and they may possibly be much greater than the actual yaw rate signal RATE to be measured. The demodulation signal v_prop, which is obtained from the PLL, is therefore also phase-shifted by &agr; in order to determine the yaw rate precisely and in order not to have components of interference signal QUAD in the output signal.
In order to balance the PLL at the band end, demodulation takes place in the signal path according to QUAD (x_prop), the external yaw rate is applied and the phase is changed until it is no longer possible to observe an effect on the signal output by the yaw rate.
FIG. 1
shows schematically the circuitry of an implementation of this method.
This method may be applied if the quadrature signals are so small that they do not overmodulate the signal path. However, if the interference signals are greater than the useful signal by several orders of magnitude, then a quadrature control loop is provided. This is implemented as an extension of the illustration of
FIG. 1
in
FIG. 2
to illustrate the related art.
The previously described balancing method now fails since when a yaw rate is applied and the PLL is incorrectly balanced, the quadrature control loop suppresses the quadrature demodulated yaw rate signal at the signal output, i.e., the criterion for balancing the PLL is lacking. Rather, the signal at the quadrature controller output is used here as a balancing criterion. Very small V/°(&agr;) signals are produced at the output of the quadrature controller which become even smaller if the capture range of the controller is large. It is not possible to avoid these problems by strengthening the output of controller output signal UI (see
FIG. 2
;
FIG. 4
) since the supply voltage available is usually limited and amounts to 5V, for example. The signal for suppressing the quadrature is often substantially greater than the signal produced by applying a yaw rate. Amplified signal UI would therefore reach the limits of the possible modulation range.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a method for balancing the phase-locked loop of an electronic analyzing device, which analyzes the output signal of a sensor device such as a yaw rate sensor utilizing the Coriolis effect in particular, as well as to provide an electronic analyzing device, the method and the analyzing device making it possible for the phase-locked loop of the electronic analyzing device to balance the phase-locked loop of the electronic analyzing device with a clearly higher percentage rate of assigned sensor devices.
As already explained above, in order to suppress deflection-proportional interference signals, a quadrature control loop is used in the analyzing device to analyze the output signal of a sensor device.
An important aspect of the present invention is that the quadrature control loop is expanded so that the output signal of the controller of the quadrature control loop delivers a higher output voltage during the balancing of the phase-locked loop than during normal control operation. The output signal delivered is a function of the amplitude of the external yaw rate acting on the sensor device and phase angle a set in the PLL. It is thus possible to dimension the capture range of the quadrature control loop for normal control operation in such a way that even sensor devices having large interference amplitudes may be used. This would not be possible without the change in the control loop according to the present invention since the two requirements are contradictory.
As explained, an electronic analyzing device is assigned to each sensor device, the phase-locked loop of each analyzing device being balanced to the specific sensor. Since the electronic analyzing device of the present invention and the method of the present invention for balancing the phase-locked loop allows the possibility for even balancing sensor devices, the output signals of which have a higher interference signal, it is possible to significantly reduce the reject rate of non-balanceable sensor devices and accordingly the production costs.
Furthermore, it is an advantage that the method of the present invention to balance the phase-locked loop can be completely automated with very little expense for circuitry and is thus suitable for mass production.


REFERENCES:
patent: 5287033 (1994-02-01), Morton
patent: 5379223 (1995-01-01), Asplund
patent: 5600064 (1997-02-01), Ward
patent: 5850035 (1998-12-01), Hilby et al.
patent: 6067858 (2000-05-01), Juneau et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for adjusting the phase-locking loop of an electronic... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for adjusting the phase-locking loop of an electronic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for adjusting the phase-locking loop of an electronic... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3217752

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.