Computer graphics processing and selective visual display system – Display driving control circuitry – Waveform generator coupled to display elements
Reexamination Certificate
2000-02-23
2002-03-12
Chang, Kent (Department: 2778)
Computer graphics processing and selective visual display system
Display driving control circuitry
Waveform generator coupled to display elements
C345S060000
Reexamination Certificate
active
06356261
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for addressing a plasma display panel, and, more particularly, to a method adopted for an addressing step in a method for driving a plasma display panel in which a reset step, an address step and a sustain-discharge step are performed in a unit subfield.
2. Description of the Related Art
FIG. 1
shows a general surface-discharge plasma display panel,
FIG. 2
is a diagram showing an electrode line pattern of the plasma display panel shown in
FIG. 1
, and
FIG. 3
shows a cell forming a pixel of the plasma display panel shown in FIG.
1
. Referring to the drawings, address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
, a dielectric layer
11
(and/or
141
of FIG.
3
), scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and a MgO layer
12
as a protective layer are provided between front and rear glass substrates
10
and
13
of a general surface-discharge plasma display panel
1
.
The address electrode lines A
1
, A
2
, A
3
, . . . , A
m−2
, A
m−1
and A
m
, coat the front surface of the rear glass substrate
13
in a predetermined pattern. Phosphors (
142
of
FIG. 3
) may coat over the front surface of the address electrode lines A
1
, A
2
, . . . , A
m−1
and A
m
. Otherwise, the phosphors
142
may coat the dielectric layer
141
in the event that the dielectric layer
141
coats address electrode lines A
1
, A
2
, . . . , A
m−1
and A
m
in a predetermined pattern.
The common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
are arranged on the rear surface of the front glass substrate
10
orthogonal to the address electrode lines A
1
, A
2
, A
3
, . . . , A
m−2
, A
m−1
and A
m
in a predetermined pattern. The respective intersections define corresponding pixels. The common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
each comprise indium tin oxide (ITO) electrode lines X
na
and Y
na
, and a metal bus electrode lines X
nb
and Y
nb
, as shown in FIG.
3
. The dielectric layer
11
entirely coats the rear surface of the common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
. The MgO layer
12
to protects the panel
1
against a strong electrical field entirely coats the rear surface of the dielectric layer
11
. A gas for forming plasma is hermetically sealed in a discharge space
14
.
The driving method generally adopted to the plasma display panel described above is an address/display separation driving method in which a reset step, an address step and a sustain-discharge step are sequentially performed in a unit sub-field. In the address step of the address/display separation driving method, typically, while a scanning pulse is sequentially applied to all scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, corresponding image data signals are applied to the address electrode lines A
1
, A
2
, A
3
, . . . , A
m−2
, A
m−1
and A
m
. However, according to the addressing method using a single pulse, sufficient wall charges cannot be produced at pixels to be displayed, which lowers the accuracy of display.
To solve this problem, there has been disclosed an addressing method in which a preliminary pulse for auxiliary discharge is applied immediately before a scanning pulse is applied. However, in view of driving characteristics of a three-electrode surface-discharge plasma display panel, the preliminary pulse should have a polarity opposite to that of the scanning pulse. Accordingly, while the preliminary pulse is applied to one of the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, if the scanning pulse is applied to another scan electrode line, an undesired discharge is liable to occur at pixels between the corresponding scan electrode lines. According to the auxiliary-charge addressing method, since time for a preliminary pulse to be applied to the respective scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
is necessary, the address period in this method is longer than that in the conventional method, which lowers display luminance.
SUMMARY OF THE INVENTION
To solve the above problems, it is an objective of the present invention to provide a method for addressing a plasma display panel, by which both accuracy and luminance of display can be enhanced in driving the plasma display panel.
Accordingly, to achieve the above objective, there is provided a method for addressing a plasma display panel in which scan electrode lines are arranged parallel with one another and address electrode lines are arranged so as to be orthogonal to the scan electrode lines, defining corresponding pixels at the respective intersections, the method including grouping the scan electrode lines into at least two scan electrode groups each having an equal number of scan electrode lines, sequentially applying a preliminary pulse having a first polarity and a scanning pulse having a second polarity opposite to the first polarity to the respective scan electrode groups, wherein while the preliminary pulse is applied to a scan electrode line of a first scan electrode group, the scanning pulse is applied to the scan electrode line immediately preceding the scan electrode line of the second scan electrode group corresponding to the scan electrode line of the first scan electrode group, and applying corresponding image data signals to all address electrode lines while the scanning pulse of the second polarity is applied to the respective scan electrode groups.
According to the addressing method of the present invention, the scan electrode line to which the preliminary pulse is applied and the scan electrode line of the second scan electrode group are spaced a predetermined distance apart from each other, by the partitioning of the scan electrode groups. Accordingly, even if the scanning pulse is applied to the scan electrode line of the second scan electrode group while the preliminary pulse is applied to the scan electrode line of the first scan electrode group, discharge does not occur between the two scan electrode lines.
REFERENCES:
patent: 4044349 (1977-08-01), Andoh et al.
patent: 6084558 (2000-07-01), Setoguchi et al.
patent: 6232935 (2001-05-01), Fukushima et al.
patent: 6236165 (2001-05-01), Ishizuka
Chang Kent
Leydig , Voit & Mayer, Ltd.
Samsung SDI & Co., Ltd.
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