Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-06-03
2008-06-03
Mai, Son L. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185030, C365S185170
Reexamination Certificate
active
07382660
ABSTRACT:
Multi-level programming allows for writing a first and a second bit in selected cells by separately programming the first bit from the second bit. Programming of the first bit determines a shifting from a first threshold level to a second threshold level. Programming of the second bit requires a preliminary reading to detect whether the first bit has been modified, performing a first writing step to bring the cell to a third threshold voltage if the first bit has been modified and performing a second writing step to bring the selected cell to a fourth threshold voltage different from the third threshold level if the first bit has not been modified. For increasing reading and program reliability, during preliminary reading of the second portion a reading result is forced to correspond to the first threshold level.
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Altieri Vincenzo
Bovino Angelo
De Matteis Mario
Micheloni Rino
Ravasio Roberto
Hynix / Semiconductor Inc.
Iannucci Robert
Jorgenson Lisa K.
Mai Son L.
Seed IP Law Group PLLC
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