Method for accelerated test of semiconductor devices

Excavating

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

3241581, 324719, 324765, G11C 2900, G01R 104

Patent

active

059205741

ABSTRACT:
A method for an accelerated test of semiconductor devices comprises the steps of determining a relational expression t.sub.1 =t.sub.2.sup.m between an information holding lifetime t.sub.1 at a temperature T.sub.1 and another lifetime t.sub.2 at another temperature T.sub.2, expressing the exponent m as a function of the temperature that is proportional to the Boltzmann's factor, and calculating the information holding lifetime t.sub.2 at the temperature T.sub.2 on the basis of the information holding lifetime t.sub.1 at the temperature T.sub.1 using the relational expression.

REFERENCES:
patent: 3474530 (1969-10-01), Ainslie et al.
patent: 4483629 (1984-11-01), Schwarz et al.
patent: 4739258 (1988-04-01), Schwarz
patent: 5287313 (1994-02-01), Okajima
patent: 5291142 (1994-03-01), Ohmi
patent: 5497076 (1996-03-01), Kuo et al.
patent: 5696452 (1997-12-01), Hemmenway et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for accelerated test of semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for accelerated test of semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for accelerated test of semiconductor devices will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-904977

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.