Method bonding for production of SOI transistor device

Details Method bonding for production of SOI transistor device Method bonding for production of SOI transistor device

1993-05-20

1995-12-26

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 62, 437974, 148DIG12, H01L 2176

Patent

active

054787823

ABSTRACT:
A wafer bonding method for forming a SOI structure comprising the steps of bringing wafers into proximity in a state with one wafer a slight, substantially uniform clearance away from the other wafer and pressing one point of at least one wafer of the two wafers against the other wafer. In another aspect of the invention, there is provided a method of positioning for photolithography using an alignment mark portions and/or a vernier portions formed on a SOI substrate, which comprises the step of removing semiconductor layer portions corresponding to the alignment mark portions and/or the vernier portions. In further another aspect of the invention, there is provided a new DRAM semiconductor device formed by using SOI structure, which comprises a new pattern of a strage node formed longitudinally along a word line. Further, there is provided a new DRAM semiconductor device formed by using SOI structure, which comprises a unique strage node having a conductive side wall.

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