Method apparatus, and system providing adjustable memory...

Details Method apparatus, and system providing adjustable memory... Method apparatus, and system providing adjustable memory...

2009-05-19

2011-11-22

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S200000, C365S230060

Reexamination Certificate

active

08064258

ABSTRACT:
A method, apparatus and system providing a memory device having an array of cells which may be selectively designated for either error correction code use or redundancy cell use.

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patent: 2003/0043651 (2003-03-01), Kojima et al.
patent: 2007/0121396 (2007-05-01), Nitzan et al.
patent: 2009/0259799 (2009-10-01), Wong

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