Method, apparatus and system for acquiring a plurality of...

Details Method, apparatus and system for acquiring a plurality of... Method, apparatus and system for acquiring a plurality of...

2005-01-11

2005-01-11

Kim, Hong (Department: 2186)

Electrical computers and digital processing systems: processing

Instruction decoding

C712S214000, C711S156000, C711S151000, C711S152000, C710S200000, C710S220000, C707S793000

Reexamination Certificate

active

06842847

ABSTRACT:
A multiprocessor data processing system includes first and second processors coupled to an interconnect and to a global promotion facility containing a plurality of promotion bit fields. The first processor executes a single acquisition instruction to concurrently acquire a plurality of promotion bit fields exclusive of at least the second processor. In response to execution of the acquisition instruction, the first processor receives an indication of success or failure of the acquisition instruction, wherein the indication indicates success of the acquisition instruction if all of the plurality of promotion bit fields were concurrently acquired by the first processor and indicates failure of the acquisition instruction if fewer than all of the plurality of promotion bit fields were acquired by the first processor.

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