Electrical computers and digital processing systems: processing – Architecture based instruction processing – Stack based computer
Patent
1998-07-30
2000-08-22
Coleman, Eric
Electrical computers and digital processing systems: processing
Architecture based instruction processing
Stack based computer
711204, G06F 1136
Patent
active
06108767&
ABSTRACT:
Apparatus, methods, and computer program products are disclosed that improve the operation of a computer that uses a top-of-stack cache by reducing the number of overflow and underflow traps generated during the execution of a program. An exception history is maintained that tracks recent occurrences of overflow and underflow exception traps. This exception history is hashed with the address of the computer instruction that caused the exception to generate an index into a set of predictors. Thus, a predictor is used that is responsive to the current exception history of the top-of-stack cache.
REFERENCES:
patent: 4951194 (1990-08-01), Bradley
patent: 5050067 (1991-09-01), Mclagan
patent: 5107457 (1992-04-01), Hayes
patent: 5233691 (1993-08-01), Ando et al.
patent: 5504925 (1996-04-01), Jeffs
patent: 5581775 (1996-12-01), Katz
patent: 5673426 (1997-09-01), Shen
patent: 6006323 (1999-12-01), Ma et al.
"Floating-Point Unit," Intel Architecture Software Developer's Manual--Vol. 1: Basic Architecture. Illinois: Intel Corporation. 7-1 to 7-55 (1997).
Hayes, J.R. et al., "An Architecture for the Direct Execution of the Forth Programming Language," Computer Architecture News. 15:(05) 42-49 (1987).
The SPARC Architecture Manual. Eds. David L. Weaver and Tom Germond. New Jersey: PTR Prentice Hall 8-14, 20-21, 30-39, 56-59, 78-83, 102-103, 148-149, 166-167, 170-171, 212-217, 290-309 (1994).
Lee, Johnny et al., "Branch Prediction Strategies and Branch Target Buffer Design," Computer Science Div., EECSA Dept., University of California, Berkeley, CA, Jan. 1984.
Lilja, David J., "Reducing the Branch Penalty in Pipelined Processorss," Survey & Tutorial Series, Jul. 1988.
Smith, James E., "A Study of Branch Prediction Strategies," The Institute of Electrical and Electronics Engineers, Inc. New York, New York, May 1981 .
Coleman Eric
Curtis Daniel B.
Sun Microsystems Inc.
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