Method, apparatus and computer program product for optimizing re

Electrical computers and digital processing systems: processing – Byte-word rearranging – bit-field insertion or extraction,...

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712210, 712204, 712202, 711212, 711132, 711206, G06F 934, G06F 1204

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active

060187999

ABSTRACT:
Apparatus, methods and computer program products are disclosed that enable a compiler to generate efficient code to access stack registers on a register stack. The invention operates by transforming a three-operand instruction, within a compiler's intermediate representation, to one or more fewer-than-three-operand instructions. The invention also transforms the instruction's operand addressing from an access to a pseudo-named register to an access to a stack register through stack offset into a register stack. The invention also determines the register stack state at each instruction responsive to register stack permutations and maps the stack offset accordingly for each subsequent access to a stack register.

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patent: 5898850 (1999-04-01), Dickol et al.
"Floating-Point Unit", Intel Architecture Software Developer's Manual, vol. 1: Basic Architecture, Chapter 7, 1997.
"Optimization Techniques for Floating-Point Applications", Intel Architecture Optimization Manual, Chapter 5, 1997.
Alfred V. Aho et al., "Compilers: Principles, Techniques and Tools," Addison-Wesley Publishing Co., 1988, pp.608-633.
Alfred V. Aho et al., "Compilers: Principles, Techniques and Tools," Addison-Wesley Publishing Co., 1988, Chapters 8,9 and 10, pp. 463-722.
G.J. Chaitin, Register Allocation & Spilling via Graph Coloring, Proceedings of the SIGPLAN '82 Symposium on Compiler Construction, Jun. 1982, pp. 98-105.

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