Data processing: measuring – calibrating – or testing – Measurement system – Performance or efficiency evaluation
Reexamination Certificate
2002-04-04
2004-09-07
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Measurement system
Performance or efficiency evaluation
C714S010000
Reexamination Certificate
active
06789048
ABSTRACT:
BACKGROUND
1. Field of the Invention
The invention concerns diagnosing a processor in a computer system having a number of processors with a processing load distributed among the processors, and more particularly concerns deconfiguring the processor responsive to the diagnosis.
2. Related Art
It is known to diagnose a processor by performing tests using hardware that is specially designed for dedicated exclusively to error checking. It is also known to diagnose a processor by having the processor execute test computations and check the results against known patterns. Conventionally, if a series of test computations by the processor generates erroneous results a notation is entered in an error log, but the computer system continues to use the processor. One reason for this conventional limitation has been that floating point diagnostics are difficult to design and verify, and therefore error indications produced by them are suspect. Also, there has been little awareness that errors not detected during an initial program load were likely to occur and could be reliably detected by test instructions running on ordinary floating point logic during run time. Consequently, while tests performed by special hardware have sometimes been relied on as a basis for detecting failure and deconfiguring a processor during run time, test instructions performed by ordinary floating point logic have conventionally been used to merely confirm failures otherwise detected. A need therefore exists for improvements in detecting processor failure and deconfiguring the processor during run time.
SUMMARY
The foregoing need is addressed in the present invention. According to a method form of the invention, in a computer system having a processing load distributed among a number of processors in the system, test computations are performed at intervals by floating point logic of a processor responsive to stored test instructions. Responsive to the test computations indicating an erroneous result by one of the processors information is passed by a firmware process and entered into an operating system error log. Responsive to the information, an operating system deconfiguration service is notified of the error log entry, and the service deconfigures the indicated processor, while the system is still running.
Objects, advantages, additional aspects, and other forms of the invention will become apparent upon reading the following detailed description and upon reference to the accompanying drawings.
REFERENCES:
patent: 4916652 (1990-04-01), Schwarz et al.
patent: 5172378 (1992-12-01), Sugioka et al.
patent: 5649090 (1997-07-01), Edwards et al.
patent: 5699502 (1997-12-01), Swanberg et al.
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patent: 6161208 (2000-12-01), Dutton et al.
patent: 2003/0131279 (2003-07-01), Hack et al.
Arndt Richard Louis
Benignus Douglas Marvin
Bossen Douglas Craig
Henderson Daniel James
Kitamorn Alongkorn
Charioui Mohamed
England Anthony V. S.
Hoff Marc S.
McBurney Mark E.
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