Method, apparatus and computer program product for...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07809543

ABSTRACT:
A method, apparatus, and computer program product for creating a model representing an electrical network residing in an integrated circuit package.

REFERENCES:
patent: 6526555 (2003-02-01), Teig et al.
patent: 2001/0034587 (2001-10-01), Anderson et al.
patent: 2005/0114806 (2005-05-01), Gasparik et al.
patent: 2006/0123374 (2006-06-01), Douriet
Na et al. The effects of on-chip and package decoupling capacitors and and efficient ASIC decoupling methodology, 2004, IEEE proceedings of 54th electronic components and technology conference, vol. 1, 556-567.
Brain W. Amick, Claude R. Gauthier, Dean Liu, “Macro-Modeling Concepts for the Chip Electrical Interface”, ACM 1-58113-461-4/02/0006, Jun. 10-14, 2002, pp. 391-393.

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