Method, apparatus, and computer program for evaluating noise...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

10278507

ABSTRACT:
A method of evaluating noise immunity of a semiconductor device is provided. An actual circuit including the semiconductor device is represented by an equivalent circuit which has a target equivalent circuit, a noise source equivalent circuit, and an external equivalent circuit connected in parallel. The target equivalent circuit represents the semiconductor device. The noise source equivalent circuit represents a noise source outside the semiconductor device, and supplies noise to the target equivalent circuit. The external equivalent circuit represents a circuit outside the semiconductor device. The noise immunity is evaluated based on a voltage or current which arises in the target equivalent circuit by the noise. In this way, the immunity of the semiconductor device against extraneous noise can be evaluated in consideration of the effects of the circuitry outside the semiconductor device.

REFERENCES:
patent: 4481628 (1984-11-01), Pasquinelli
patent: 5883521 (1999-03-01), Nishikawa
patent: 5901305 (1999-05-01), Futagami
patent: 6173427 (2001-01-01), Tsukagoshi
patent: 6281697 (2001-08-01), Masuda et al.
patent: 6429676 (2002-08-01), Chun et al.
patent: 6549019 (2003-04-01), Nielsen
patent: 2002/0017912 (2002-02-01), Tamaki et al.
George A. Katopis (IEEE 1985) teaches a (Delta-I noise Specification for High-Performance Computing Machine).

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