Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Distributive type parameters
Reexamination Certificate
2002-03-14
2004-06-01
Deb, Anjan K. (Department: 2858)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Distributive type parameters
C324S601000, C324S612000, C702S057000, C703S002000
Reexamination Certificate
active
06744262
ABSTRACT:
BACKGROUND
A vector network analyzer (VNA) is conventionally used to measure scattering parameters by presenting a stimulus to a device under test (DUT) and measuring the DUT's response to the stimulus. The resulting scattering parameters mathematically define electrical behavior in terms of reflection and transmission coefficients of the measured DUT over a frequency range of interest. It is typically not possible to directly connect the DUT to the VNA to obtain a measurement of only the DUT. It is more typical that there are intermediate connectors, cables, transmission lines and other circuitry between the stimulus and measurement ports of the VNA and the DUT. For purposes of the present disclosure, the general term that is used for all of the intermediate connections between the VNA and the measured device is “an adapter”. At low frequencies the electrical behavior of the adapter may not significantly affect the measurement of the DUT. At high frequencies, however, the response of the adapter as cascaded with the DUT for which a measurement is desired, can be as significant or more significant that the response attributable to the DUT itself. It is therefore imperative that the measurement process be able to account for and eliminate the effects of the adapter to obtain a measurement of the electrical behavior of the DUT in isolation. This process is called de-embedding the DUT from the adapter or characterizing the DUT.
Once the DUT is characterized, a circuit designer is able to use the mathematical representation of the electrical behavior of the DUT together with a modeled or measured circuit to predict the electrical behavior of the DUT in combination with the modeled or measured circuit. This practice is termed “embedding” and is especially valuable because circuit combinations may be designed and tested without expending the time, money, and effort to build and test a prototype. Obviating the practice of building prototypes that do not operate as desired reduces time to market because it increases the probability that a circuit that is eventually built will optimally perform for its intended purpose.
Agilent Technologies, Inc. application note 1364-1 entitled “De-embedding and Embedding S-Parameter Networks Using a Vector Network Analyzer” presents a process for de-embedding a measurement of a DUT from the interfering electrical effects of intermediate adapters and is hereby incorporated by reference. With specific reference to
FIG. 1
of the drawings, there is shown a test set-up for a 2N-port DUT
100
. A first adapter
102
, also having 2N adapter ports is cascaded with the 2N-port DUT
100
as well as a 2N port second adapter
110
. The cascaded combination of the first adapter
102
, the DUT
100
, and the second adapter
110
is connected to VNA
106
. The VNA
106
has 2N test ports
116
1
through
116
2N
and comprises a stimulus
112
, a test set
104
, a reference channel receiver
94
, and a plurality of test channel receivers
96
1
through
96
2n
. The output of the stimulus
112
is connected to first signal separating device
92
. The forward orientation of the first signal separating device
92
samples a small amount of output power from the stimulus
112
and feeds the sampled signal to the reference channel receiver
94
to provide a reference measurement. Most of the output power from the stimulus
112
, however, is delivered to a pole of a single pole, multiple throw switch
98
. The switch
98
selectively connects the stimulus signal to one of a plurality of switch output ports
114
1
through
114
2n
.
FIG. 1
shows an embodiment of the switch
98
having as many output ports
114
as there are adapter ports to measure in the cascaded combination of the first adapter
102
, the DUT
100
, and the second adapter
110
. The test set
104
also comprises a plurality of single pole double throw switches
90
1
through
90
2n
connected to each switch output port
114
. The single pole double throw switches
90
1
through
90
2n
permit a signal delivered by the stimulus
112
to be fed to any port of the cascaded combination while the remaining ports are terminated in one of a plurality of respective characteristic impedances
120
1
through
120
2n
. Accordingly, a signal from the stimulus
112
may be fed to any test port
116
through an appropriate configuration of switch
98
and switches
90
1
through
90
2n
. Concurrently, all remaining test ports
116
may be terminated to its characteristic impedance
120
.
FIG. 1
shows the signal from the stimulus
112
being fed to port
1
of the first adapter
102
while all remaining first and second adapter ports that are connected to test ports
116
are terminated with a characteristic impedance. Each test port
116
comprises a respective test channel signal-separating device
88
1
through
88
2n
. A main arm of each test channel signal-separating device
88
is connected to a respective test port
116
. As illustrated in
FIG. 1
, the first adapter ports
1
through n and the second adapter ports n+1 through 2n are each connected to one of the test ports
116
. The sampling arm of each test channel signal-separating device
88
is connected to each one of a respective plurality of VNA test channel receivers
96
1
through
96
2n
. The test channel receivers
96
measure the output power present at each test port
116
. A reverse orientation of the signal separating devices
88
permits measurement of both reflected and transmitted signals from the adapter ports to which the VNA test channel is connected. As a signal from the stimulus
112
is swept across a desired frequency bandwidth, the ratio of power measured at the test channel receivers
96
relative to the power measured at the reference channel receiver
94
is obtained. As shown in the illustration of
FIG. 1
, it is desirable to have as many VNA test ports
116
as there are adapter ports to measure. As the number of ports increases, however, this luxury becomes economically prohibitive. Accordingly, it is conventional practice to share VNA test ports
116
at the expense of speed to make the same measurements.
FIG. 1
illustrates the DUT
100
having input device ports
108
1
through
108
n
and device ports
108
n+1
and
108
n+1
through
108
2n
connected to ports n+1 through 2n of the first adapter
102
and ports
1
through n of the second adapter
110
, respectively. The first and second adapters
102
,
110
are cascaded with the DUT
100
on either side so that all device ports
108
are connected to the VNA test ports
116
through either the first or second adapters
102
,
110
. As one of ordinary skill in the art appreciates, the first and second adapters
102
,
110
represent all of the connectors, cabling and circuitry required connecting the DUT
100
to the VNA
106
. If the S-parameters for the first adapter
102
and the second adapter
110
are known either through measurement or modeling, one can measure the cascaded combination of the first and second adapters
102
,
110
with the DUT
100
. The S-parameters may then be converted to the corresponding scattering transfer parameters also termed transmission parameters or T-parameters. The matrix T
X
represents the T-parameters of the first adapter
102
, the matrix T
Y
represents the T-parameters of the second adapter
110
, and T
c
represents the T-parameters of the cascaded combination of first and second adapters
102
,
110
and the DUT
100
. The T-parameters of the DUT, represented by the matrix T
D
, may be mathematically extracted from these measurements by using:
[
T
c
]=[T
X
]·[T
D
]·[T
Y
]
Solving for T
D
:
[
T
D
]=[T
X
]
−1
·[T
c
]·[T
Y
]
−1
The T-parameter matrix for the DUT, T
D
, may then be converted into its corresponding S-parameter matrix, S
D
.
It is known to use the same principles to de-embed and embed a DUT having more than four ports. U.S. Pat. No. 5,578,932 entitled “Method and Apparatus for Prov
Agilent Technologie,s Inc.
Deb Anjan K.
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