Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system
Reexamination Certificate
2002-09-27
2011-10-25
Shah, Kamini S (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
C703S014000, C716S106000
Reexamination Certificate
active
08046206
ABSTRACT:
A method of defining a configuration of hardware resources, using a subgraph isomorphism process. The method executes a subgraph isomorphism process to discover possible resources in a hardware resource space that are suitable to implement a function. The hardware resource space may be defined by a target graph and the function may be defined by a subgraph. Next, the target graph is annotated to establish configuration settings for selected resources of the possible resources. The configuration settings may be established based on the subgraph mapping to the target graph. The target graph may also be annotated to specify parameters for the selected resources. This annotation may be performed in response to receiving parameters for the function.
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Hood, III Frederick R.
Ogami Kenneth Y.
Cypress Semiconductor Corporation
Lo Suzanne
Shah Kamini S
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