Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step
Reexamination Certificate
2000-08-24
2003-02-18
Fabury, Wael (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Including adhesive bonding step
C438S018000, C438S126000
Reexamination Certificate
active
06521486
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to integrated circuit (IC) devices, and more particularly to reducing the level of switching signal noise on such devices.
BACKGROUND OF THE INVENTION
Integrated circuit (IC) devices frequently suffer from the problem of switching signal noise. It is generally known that in order to alleviate the problem of switching signal noise, the addition of a decoupling capacitor between the power supply pins on an IC device will reduce the ground bounce that occurs due to switching signal noise on IC devices.
One conventional approach which attempts to resolve the problem involves the process of adding a capacitor on the outside of packaged IC devices. However, a major shortcoming of this conventional method is that in some cases, the switching signal noise is not detectable at the package level. In other words, noise can not be detected through the lead frame pins (or solder connection balls for Ball Grid Array (BGA) packages), therefore, the device cannot be effectively tested.
In another conventional approach, the addition of a decoupling capacitor is achieved by fabricating a transistor type capacitor within the circuitry of the device. However, this requires the modification, or re-fabrication of the circuit design. Therefore, this method is undesirable since it requires unduly expenditure of the time and expense associated with the re-fabrication of the circuit design.
Accordingly, what is needed is an efficient and effective method and system for reducing switching signal noise that allows one to determine the effect of an added capacitor(s). The resulting device should allow testing for various qualities such as the level of ground bounce noise, and/or the level of switching signal noise. Further, it should not be necessary to re-fabricate the device in order to achieve the above. Such a method, system, and device should allow for an efficient, and effective way to reduce the level of switching signal noise in the device. Further, such a method, system, and device should improve efficiency, and reduce the cost of manufacturing. The present invention addresses such a need.
SUMMARY OF THE INVENTION
In accordance with the present invention, an improved method, and system for minimizing switching signal noise on a device is disclosed which results in an improved device. At least one conductive line is deposited within a device. Additionally, at least one capacitor is attached to the at least one conductive line within the device. An improved capacitor-integrated circuit device can result from the improved method and system described herein.
Accordingly, the method, system, and device of the present invention overcomes the problems of conventional approaches by describing the addition of at least one chip-scale capacitor on a device which reduces the problem of switching signal noise. By adding a chip-scale capacitor between the power supply pins on the device, the problem of switching signal noise can be alleviated, and the device can be tested for ground bouncing noise without going through the process of changing device circuit designs. Therefore, the problems, inconvenience, and expense associated with adding actual integrated capacitors into the circuits and re-fabrication of the devices are overcome by the present invention.
REFERENCES:
patent: 4646119 (1987-02-01), Kosonocky
patent: 5095402 (1992-03-01), Hernandez et al.
patent: 5564617 (1996-10-01), Degani et al.
patent: 5598033 (1997-01-01), Behlen et al.
patent: 5724729 (1998-03-01), Sherif et al.
Coiner Michael
Hirata Reid
Li Xia
Brewster William M.
Fabury Wael
Sawyer Law Group LLP
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