Method and system to process semiconductor wafers

Details Method and system to process semiconductor wafers Method and system to process semiconductor wafers

2002-02-06

2004-05-04

Gandhi, Jayprakash N. (Department: 3652)

Data processing: generic control systems or specific application

Specific application, apparatus or process

Product assembly or manufacturing

C700S095000, C700S103000, C700S110000

Reexamination Certificate

active

06732006

ABSTRACT:

TECHNICAL FIELD
This invention relates to the field of semiconductor manufacturing and more specifically to a method and system to process semiconductor wafers, to interrupt this processing if an alarm condition exists and to recover the situation after an interruption has taken place.
BACKGROUND OF THE INVENTION
In automated fabrication plants or inside a complex wafer-processing tool, work pieces travel from one process station to another. At these process stations various operations are performed on the work pieces. During processing certain events may occur that will require the system to shutdown or at the very least temporarily pause processing. These may include problems in a process station detected by examining the output of the process station or by detection of out of specification parameters in a system, among other problems. When this occurs, it is necessary to halt the processing of wafers in the system to prevent further damage. However, when the processing is halted, wafers of which the processing is halted may still be present in the system. These wafers block the continuation of further processing in the system after the alarm condition has been resolved. After resolving of the alarm condition that resulted in interruption of the process, the further processing or handling of these wafers of which the processing was interrupted needs to be defined before the system can be used for continued processing. Therefore, there is a need for a way to monitor for and handle conditions that require the interruption of processing in a process tool and, after interruption, the recovery of the system and continuation of further processing.
Part of this problem is addressed in U.S. Pat. No. 6,162,010 issued to Ishizawa et al. and entitled “Method of Recovering Object to be Treated After Interruption”. This patent discusses the recovery of a semiconductor wafer after a treatment is unexpectedly stopped for a reason such a loss of power to the processing machinery. This patent discloses recovering wafers to an original cassette if the wafers are cooled and allowing the wafers to cool if the wafers were in a reactor-processing chamber. This method suffers from several drawbacks. First, it is drawn to a single wafer processing system and is not easily adaptable to batch processing. Second the recovery method is rigid and does not allow for override by operator or temporary suspension.
International Publication WO 01/18623 A1 entitled “Real-Time Fault Detection” discloses a method for detecting faults in semiconductor wafers in a real time environment. In this disclosure, a method and system for determining if there are faults within a system is disclosed. If a fault in the manufacturing system exists, that information is sent to an interface that could shut down the process or provide information to an operator. Drawbacks to this invention include its lack of ability to override a fault detection or to handle a fault detection in a variety of ways.
Another approach is disclosed in U.S. Pat. No. 5,897,710 issued to Sato et al. entitled “Substrate Processing Apparatus and Substrate Processing Method”. In the invention of Sato et al, an inspection station is included with a processing system. The inspection station is able to inspect the wafers. When wafers fail inspection, further processing can be interrupted immediately.
A disadvantage of the methods described above is that the action of immediate interruption of a process might in itself create damage because the work pieces concerned receive only a partial treatment. It is questionable if completion of the treatment in a later stage will result in the desired end effect, without complications and negative side effects.
It is the objective of the present invention to provide in a system an method to deal with an alarm condition in a way that prevents the necessity of immediate process interruption and its disadvantages and to provide in pre-programmed, operator selectable recovery procedures after interruption has taken place.
SUMMARY OF THE INVENTION
The object of the invention is achieved by providing an alarm level that allows continuing already started processing but prevents the start of processing of next batches.
In one embodiment, a method and system for processing one ore more wafers in a process tool is provided including subjecting the one or more wafer in a reaction chamber to a process. The method includes generating an inhibit next load flag (INL flag) on predefined conditions, the inhibit next load flag not effecting already started processing of a wafer. Prior to the start of the processing of a wafer, a check is performed to see if an inhibit next load flag has been set. When upon checking it has been found that an inhibit next load has been set, the start of the process is prohibited. The method further includes providing pre-programmed recovery procedures, such that after execution of a pre-programmed recovery procedure the to be processed wafer of which the start of the processing is prohibited ends in a defined state such that the tool can be used for further processing. In another embodiment, a method and system for the batch-wise processing of wafers in a process tool is provided including subjecting the wafers batch-wise to a process in a reaction chamber. The method includes generating an inhibit next load flag on predefined conditions, the inhibit next load flag not effecting already started processing of a wafer batch. Prior to the start of the processing of a wafer batch, a check is performed to see if an inhibit next load flag has been set. When upon checking it has been found that an inhibit next load has been set, the start of the process of the wafer batch in the reaction chamber is prohibited. The method further includes providing pre-programmed recovery procedures, such that after execution of a pre-programmed recovery procedure the to be processed wafer batch of which the start of the processing is prohibited ends in a defined state such that the tool can be used for further processing.
In yet another embodiment, a method and system for processing one ore more wafers in a process tool is provided including subjecting the one or more wafer in a reaction chamber to a process. The method includes setting as a default a confirmation flag in a “false” state, and examining in a wafer inspection tool a wafer previously processed in said reaction chamber and comparing the results against acceptance criteria and setting the confirmation flag in a “true” state when said results are within the acceptance criteria. The start of the processing in the reaction chamber is only allowed when the confirmation flag is in a “true” state.
Technical benefits of the present invention include that immediate interruption of an already started process is prevented as much as possible. Although immediate interruption still remains available as an option and might be used when sudden severe problems occur, like power failure, in many cases alarm conditions indicate a potential problem that needs attention. Without paying attention, such a condition might develop into a more severe problem. According to the invention the processing is interrupted prior to the start of the processing and therefore, damage to the wafers is prevented and another attempt to continue processing can be made at a later time when the alarm condition has been resolved. Further, the pre-programmed recovery procedures, including operator selectable recovery procedures, allow a very smooth and flexible recovery of the system to prepare it for further processing. Other technical benefits are apparent from the following descriptions, illustrations and claims.


REFERENCES:
patent: 5661669 (1997-08-01), Mozumder et al.
patent: 5897710 (1999-04-01), Sato et al.
patent: 6162010 (2000-12-01), Ishizawa et al.
patent: 6535769 (2003-03-01), Konar
patent: WO 01/18623 (2001-03-01), None

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