Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2002-09-12
2004-06-01
Tran, Michael (Department: 2818)
Static information storage and retrieval
Floating gate
Particular connection
C365S227000
Reexamination Certificate
active
06744666
ABSTRACT:
TECHNICAL FIELD
The present invention relates to the field of semiconductor memory devices. More specifically, the present invention relates to page programming a flash memory device.
BACKGROUND ART
Flash random access memory (RAM), more commonly known as flash memory, is a form of non-volatile storage that uses a memory cell design with a floating gate. High voltages are applied to the memory cell inputs to program or store charge on the floating gate or remove charge from the floating gate. Programming occurs by hot electron transfer to place charge on the floating gate while erasure makes use of Fowler-Nordheim tunneling in which electrons pierce a thin dielectric material, reducing the amount of electronic charge on the floating gate. Erasing a cell sets the logical value of the cell to “1” while programming the cell sets the logical value to “0”. Aside from programming or erasing operations, a flash memory operates similarly to a randomly accessible read only memory (ROM).
Current trends in memory technology are toward high-speed access, high density, and lower voltages to save power. But, higher density and lower voltage tend to reduce performance in a standard random access memory architecture. Therefore, different architecturel approaches are being used to increase performance in Flash memories. One approach is called “Page Mode”. A page is a small group of memory words that are accessed, internal to the memory, in parallel rather than one at a time. Page Mode interfaces increase the performance of Flash memory devices by storing a group of memory words in a Page buffer during an initial random data access.
In order to program and/or erase a flash memory, typically a complex process must be followed. For example, before erasing a particular sector, that sector must be programmed (known as “pre-programming”). These steps of erasing and programming involve complex application of high voltages to the memory cells for specified periods of time and in particular sequences. Many flash memories provide embedded state machines which perform the complex programming and erasing operations automatically. These processes of programming and erasing a flash memory may take a long time to complete. A typical erase sequence can take anywhere from 0.7 seconds up to 1.5 seconds. To erase an entire 64 MB density chip can take up to 60 seconds. While programming flash memory devices is usually faster, on the order to 7 to 300 microseconds, it is still slow compared to other memory devices. This is because these devices are typically programmed one 16-bit word at a time. Because of this, programming an entire chip can take up to 7 seconds (including the time to verify the data).
Occasionally during a page programming cycle, a particular word may not require programming Typically, the gates in a blank flash memory device are all open, giving each cell in the device a value of 1. When a cell is programmed, its value is set to 0. Thus, a word comprising all ones does not require programming and a programming pulse is not required for that word. However, currently there is no provision for shortening the programming pulse of words which do not require programming.
Thus, prior art methods for word programming flash memory devices are disadvantageous because of the amount of time required during programming. Specifically, programming one word at a time requires significant overhead such as performing program verification upon each word between word switching.
SUMMARY OF THE PRESENT INVENTION
In one embodiment, the present invention comprises program logic that programs a page programmable memory device with a plurality of words during a page programming cycle and a detector coupled to the program logic that identifies a particular word in that plurality of words which does not require programming. When the detector identifies a word which does not require programming, it sends an indication to the program logic component which, in response to the signal, reduces the length of the page programming cycle.
REFERENCES:
patent: 6373748 (2002-04-01), Ikehashi et al.
patent: 6580645 (2003-06-01), Lin et al.
Chen Pau-Ling
Kurihara Kazuhiro
Shieh Ming-Huei
Yachareni Santosh
Advanced Micro Devices , Inc.
Tran Michael
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