Method and system to manufacture stacked chip devices

Details Method and system to manufacture stacked chip devices Method and system to manufacture stacked chip devices

2002-01-11

2004-08-17

Elve, M. Alexandra (Department: 1725)

Electric heating

Metal heating

By arc

C219S121690

Reexamination Certificate

active

06777648

ABSTRACT:

BACKGROUND
1. Field
This invention relates generally to packaging of integrated circuits. More specifically, this invention relates to a method and system for electrically interconnecting semiconductor devices.
2. Background and Related Art
In electronic packages, semiconductor devices may be stacked together atop package substrates.
FIG. 1
(Prior Art) illustrates a package
100
. Package
100
is a stacked chip composite device that includes a substrate
101
, a semiconductor die
110
stacked atop substrate
101
, and a semiconductor die
120
stacked atop die
110
. Solder bumps
150
are typically employed to assemble the stacked chip composite device to a printed wiring board (not shown). Each die
110
,
120
and substrate
101
are electrically interconnected via wire bond technology. Specifically, each die
110
,
120
is electrically connected to substrate
101
via gold wires
130
. Die
110
and die
120
also may be electrically interconnected via gold wire connections (not shown). An encapsulant or mold
140
in package
100
protects gold wires
130
.
In other arrangements (not shown), die
120
and substrate
101
are electrically interconnected via gold wires, and die
110
and substrate
101
are electrically interconnected using solder bumps. The entire package is then encapsulated with an encapsulant.
The inclusion of gold wires and encapsulants within packages such as package
100
leads to a large total package height, which places constraints on application design. Moreover, the inclusion of gold wires and encapsulants makes such packages relatively difficult and expensive to fabricate.
Therefore, what is needed is an improved method and system for electrically interconnecting semiconductor devices.


REFERENCES:
patent: 5355102 (1994-10-01), Kornrumpf et al.
patent: 5391516 (1995-02-01), Wojnarowski et al.
patent: 5410179 (1995-04-01), Kornrumpf et al.
patent: 5970319 (1999-10-01), Banks et al.
patent: 6251488 (2001-06-01), Miller et al.
patent: 6268584 (2001-07-01), Keicher et al.

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