Method and system of cycle slip framing in a deserializer

Details Method and system of cycle slip framing in a deserializer Method and system of cycle slip framing in a deserializer

2008-05-13

2008-05-13

Corrielus, Jean B. (Department: 2611)

Pulse or digital communications

Synchronizers

C327S173000

Reexamination Certificate

active

07372928

ABSTRACT:
A method and system for cycle slip framing is disclosed. The method includes receiving an asynchronous signal and generating a synchronous pulse after receiving the asynchronous signal. The method further provides that the synchronous pulse be used to affect a bit slip that results in the moving of a character frame in the recovered data of a deserializer. According to one embodiment of the invention, the moving of the character frame is prompted by a single control signal of a clock divider circuit which causes the removal of a single clock cycle of a clock signal supplied to said deserializer.

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