Method and system for time domain multiplexers with reduced...

Details Method and system for time domain multiplexers with reduced... Method and system for time domain multiplexers with reduced...

2003-01-27

2009-06-23

Ngo, Ricky (Department: 2416)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C370S503000, C375S373000

Reexamination Certificate

active

07551651

ABSTRACT:
Method and system for a high-speed multiplexer with reduced inter-symbol interference are disclosed. In one embodiment of the present invention, two input bit streams are interleaved by a multiplexer to derive an output bit stream. Each input bit stream is latched by a return-to-differential-zero latch that drives its input bit stream to a neutral state when it is not selected by the multiplexer as output. In an alternate embodiment of the present invention, a pre-selector receives two input signals, determines which of the two input signals will be selected as output of the multiplexer and passes the bit stream unaltered, while passing a differential zero value in place of the unselected input bit stream.

REFERENCES:
patent: 5111455 (1992-05-01), Negus
patent: 5282210 (1994-01-01), Slegel et al.
patent: 7046701 (2006-05-01), Mohseni et al.
patent: 2001/0007436 (2001-07-01), Dosho et al.

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