Method and system for testing floating point logic

Details Method and system for testing floating point logic Method and system for testing floating point logic

1999-08-10

2002-07-30

Malzahn, David H. (Department: 2121)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S497000, C714S736000

Reexamination Certificate

active

06427160

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to computer systems, and more specifically to a method and system for testing the accuracy of floating-point logic devices.
2. Related Art
Floating-point notation is used to represent numbers in a computer system. This is a scientific notation format in which numbers are represented by two components: a significant and an exponent according to a given base. The significant, also known as a mantissa, specifies the significant digits in the number, which are those digits that form the sequence from the first non-zero digit to the least significant digit. The more digits that are reserved for the significant, the greater the precision of the notation. The exponent specifies the binade of the number. The term “binade” refers to a set of numbers having the same sign and given exponent. For example, given a fixed N, a binade is the set of numbers t, such that 2
N−1
<=t<2
N
. The more digits that are reserved for the exponent, the greater the range of the notation.
To find the value of number represented in floating point notation, the base is raised to the power of the exponent, and the significand is multiplied by the result. For example, in base
10
, the floating point representation of 820,000 is 8.2E+05. In this case, 8.2 is the significand and 5 is the exponent. The number's value is created using the two steps outlined above. That is, the base,
10
, is raised to the power of the exponent, 5, and the result, 100,000, is multiplied by the significand, 8.2, to yield 820,000.
Computerized systems represent numbers in binary form. As a result, these systems usually represent floating-point numbers using a base of 2. Consequently, a computer's floating point notation is less intuitive than the decimal example discussed above. Nevertheless, the computer's representation of the significand and the exponent can be conceptualized. To do this, a standard for representing numbers in a binary floating-point format will be examined. The Institute of Electrical and Electronics Engineers' Standard 754 defines what is known as single and double precision representations. In single precision, 24 bits are used to represent the significand and 8 bits are used to represent the exponent. In double precision, 53 bits are used to represent the significand and 11 bits are used to represent the exponent. In fact, the standard itself specifies only 23 and 52 bits for the significands, but an additional bit of precision is implied, since the leading bit must by definition be a one. The standard also reserves one bit to signify the number's sign. By convention, the sign bit is decoded as “0” for positive and “1” for negative. Thus, the IEEE standard can be shown as:
Sign
Exponent
Significand
1 bit
8 bits-single precision
23 bits-single precision
(plus 1 implied bit)
11 bits-double precision
52 bits-double precision
(plus 1 implied bit)
Given the ranges for the significand and exponent, computer systems have to manipulate data of substantial size when performing floating-point arithmetic. And because the system must, after the desired operation has been performed, normalize the data back to the proper floating-point format, such operations require considerable computing power. In light of this, many microprocessors come with special floating-point logics, sometimes referred to as math coprocessors or numeric coprocessors, that are specially designed to perform floating-point arithmetic. These devices have registers that are sized according to the precision used. An alternative to such hardware is to provide software logic to perform the desired operations.
Regardless of what logic-type is used, there will be circumstances where the precision of the machine is insufficient to represent a number exactly. An example of this is Pi, which is the ratio of the circle's circumference to its diameter, and which has been calculated to be more than 50 billion digits. Hence, Pi and like values must be approximated before they can be stored in the register of a floating-point logic. Great care must taken to ensure that the approximation is correctly made. For incorrectly rounded values can snowball—especially when relied on in iterative schemes—and produce disastrous results. For example, not only could months of trials be wasted by the end-user of such flawed logic, but the manufacturer could become embroiled in costly recalls and public relation nightmares.
To ensure that approximations are uniform and accurately made, rounding standards for binary floating-point arithmetic were adopted in the IEEE Standard 754. One such standard is called “Round to Nearest,” which requires that the representative value nearest to the infinitely precise result be delivered. For certain applications, however, tolerances may dictate that values be rounded in a particular direction. Realizing this, the IEEE incorporated “Directed Roundings” into the standard. These roundings are comprised of three types: Round-towards-Positive Infinity, Round-towards-Negative Infinity, and Round-towards-Zero, also referred to as Truncate. When rounding towards positive infinity, the rounded value is the format's value closest to and no less than the infinitely precise result. When rounding towards negative infinity, the rounded value is the format's value closest to and no greater than the infinitely precise result. And when rounding towards zero, the rounded value is the format's value closest to and no greater in magnitude than the infinitely precise result. Thus, for positive numbers, rounding towards zero will yield the same value as rounding towards negative infinity. Likewise, for negative numbers, rounding towards zero will yield the same value as rounding towards positive infinity. To appreciate how these roundings work, consider the square root of three, which is approximately 1.7. In a system having a precision of one decimal bit, the Round to Nearest and Round-Towards-Positive Infinity directed roundings would represent this value as 2, while the Truncate and Round-Towards-Negative Infinity roundings would represent this value as 1.
To ensure that a given logic conforms to IEEE standard 754, it must be rigorously tested against these rounding modes. The preferred embodiment of the present invention facilitates such testing.
INVENTION SUMMARY
Embodiments of the present invention provide methods and systems that allow for robust testing of a floating point logic. More specifically, embodiments provide computerized methods and systems for verifying whether a floating-point logic unit correctly performs directed rounding upon the results of mathematical operations of floating-point numbers. The testing is rigorous because the embodiments produce test data that lie on critical boundary conditions—data that could not practically be randomly produced. This data is then passed to the floating-point logic, which conducts the mathematical operation that is being tested, resulting in a rounded value. This value is then compared with the correctly rounded value, which the embodiment also produces. When these two values match, the logic is rounding correctly. When the values do not match, the logic is flawed.


REFERENCES:
patent: 5887003 (1999-03-01), Ranson et al.
patent: 6101523 (2000-08-01), Chen et al.
patent: 6108772 (2000-08-01), Sharangpani
Doug Priest, “Strategies for Testing Floating Point Arithmetic” (USA, 1997).
W. Kahan, “A Test for Correctly Rounded SQRT” (USA, 1996).
W. Kahan, “Checking Whether Floating-Point is Correctly Rounded” (USA, 1987).
Ping Tak Peter Tang, “Testing Computer Arithmetic by Elemental Number Theory” (USA, 1989).

Affiliated with

Also associated with

Rating

Method and system for testing floating point logic does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for testing floating point logic, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for testing floating point logic will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2833052