Patent
1996-08-28
1997-08-05
Bowler, Alyssa H.
395376, 395427, 395674, G06F 930
Patent
active
056551410
ABSTRACT:
A processing system and method of operation are provided. At least one execution unit processes information of a register in response to an instruction specifying the register. Each of multiple control units selectively allocates a respective one of multiple buffers to store the information in response to the instruction.
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Superscalar Microprocessor Design, Mike Johnson, Advanced Micro Devices Chapter 6, pp. 103-126, 1991.
Ogden Aubrey Deene
Vanderschaaf Neil Ray
Bowler Alyssa H.
Davis Walter D.
Davis, Jr. Michael A.
International Business Machines - Corporation
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