Patent
1995-02-10
1998-05-26
Lim, Krisna
395568, G06F 930
Patent
active
057581410
ABSTRACT:
A method and system for permitting the selective support of non-architected instructions within a superscalar processor system. A special access bit within the system machine state register is provided and set in response to each initiation of an application during which execution of non-architected instructions is desired. Thereafter, each time a non-architected instruction is decoded the status of the special access bit is determined. The non-architected instruction is executed in response to a set state of the special access bit. The illegal instruction program interrupt is issued in response to an attempted execution of a non-architected instruction if the special access bit is not set. In this manner, for example, complex instruction set computing (CISC) instructions may be selectively enabled for execution within a reduced instruction set computing (RISC) data processing system while maintaining full architectural compliance with the reduced instruction set computing (RISC) instructions.
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Kahle James Allan
Loper Albert J.
Mallick Soummya
Ogden Aubrey Deene
Sell John Victor
Dillon Andrew J.
International Business Machines - Corporation
Lim Krisna
Salys Casimer K.
Vu Viet
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