Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Reexamination Certificate
2006-08-01
2006-08-01
Vu, Thong (Department: 2142)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
Computer-to-computer data transfer regulating
C709S251000
Reexamination Certificate
active
07085847
ABSTRACT:
An apparatus for scheduling transmission of a plurality of frames in a network having a plurality of nodes, each frame identified by a type designation, includes a schedule memory and a sequencer. The schedule memory stores a transmission time for each frame type and a list of frames to be transmitted. The sequencer is operable to access the schedule memory and initiate transmission of the frames in the list.
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Darnell B. Scott
Jennings William T.
Lengel Bradley D.
Reddy Praveen S.
L-3 Communications Integrated Systems L.P.
O'Keefe Egan & Peterman, LLP
Peterman Brian W.
Vu Thong
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