Telecommunications – Transmitter – Noise or interference elimination
Reexamination Certificate
2007-04-23
2008-09-09
Nguyen, Khai M (Department: 2819)
Telecommunications
Transmitter
Noise or interference elimination
C341S122000, C341S123000, C341S155000, C375S355000
Reexamination Certificate
active
07424275
ABSTRACT:
A system includes a digital circuit that may be clocked by a digital clock signal having an associated clock period. The system also includes a sample clock generation circuit coupled to a sampling circuit. The sample clock generation circuit may be configured to receive an input clock having a fixed phase relationship with respect to the digital clock signal. The sample clock generation circuit may also generate a sample clock having a first sampling edge corresponding to a first relative offset within the clock period and a subsequent sampling edge corresponding to a different relative offset within the clock period. The sampling circuit may be configured to sample a designated signal upon a first sampling instance corresponding to the first sampling edge and to sample the designated signal upon a subsequent sampling instance corresponding to the subsequent sampling edge.
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Kivlin B. Noäl
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Nguyen Khai M
Silicon Laboratories Inc.
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