Method and system for providing successive data transfers among

Details Method and system for providing successive data transfers among Method and system for providing successive data transfers among

1994-08-17

1995-02-07

Ray, Gopal C.

Boots, shoes, and leggings

395800, 364229, 3642292, 364230, 3642304, 364240, 3642401, 3642412, 3642426, 36424292, 364DIG1, G06F 1314, G06F 1336, G06F 946

Patent

active

053882326

ABSTRACT:
A method for performing address and data transfers among a plurality of different units of a data processing system having a system bus which includes an address bus and a data bus. The system uses arbitration phase, address transfer phase, and data transfer phase operations which require the use of unique handshake signals at each phase so as to permit address and data transfers to occur on a suitable priority basis with respect to different ones of such units in a pipelined manner using non-multiplexed, asynchronous operations.

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"High-Performance Multiplexed Bus Structure", IBM Technical Disclosure Bulletin, vol. 34, No. 7A, Dec. 1991.

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