Method and system for providing electrical insulation for...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

Reexamination Certificate

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Details

C257S390000, C257S760000

Reexamination Certificate

active

06303949

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to logic circuits, and more particularly, to a system and method for providing electrical insulation for local interconnect in a logic circuit.
BACKGROUND OF THE INVENTION
As logic circuits become progressively smaller, the logic circuit architecture is typically such that it is common for electrical interconnects between point A and point B within a logic circuit to run through or over point C of the logic circuit, thus causing an unintended electrical connection to point C. A common way to avoid this problem is to route the interconnect around point C to avoid an unintended electrical connection. This routing around point C requires a longer connection than directly connecting point A to point B.
Accordingly, what is needed is a method and system for providing electrical insulation for local interconnects in a logic circuit which facilitates a direct electrical connection between two points in a logic circuit without unwanted electrical connections to other points in the logic circuit. The present invention addresses such a need.
SUMMARY OF THE INVENTION
The present invention provides a method and system for providing electrical insulation for local interconnect in a logic circuit. A system and method according to the present invention for providing electrical insulation for local interconnects during manufacturing of a logic circuit comprises the steps of providing a first layer of material over a semiconductor wafer and providing a second layer of material over the first layer. Additionally, a photoresist material is provided over a portion of the logic circuit to be electrically insulated. Portions of the first and second layers which are unprotected by the photoresist material are then etched. At least a third layer is then provided over the first and second layers, and the third layer is etched such that the first layer has an electrical insulation over the portion of the logic circuit.
The first layer remains in position to act as an electrical insulator over the portion of the logic circuit which is desired to be insulated. Consequently, a direct connection between two points of the logic circuit can be made since items between the two points are insulated. By allowing direct connection between two points, a highly efficient logic circuit can be produced.


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patent: 6037651 (2000-03-01), Hasegawa

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