Method and system for providing a reusable configurable self-tes

Details Method and system for providing a reusable configurable self-tes Method and system for providing a reusable configurable self-tes

1997-12-02

1999-12-14

Picardat, Kevin M.

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Electrical characteristic sensed

438 18, H01L 2100

Patent

active

060016620

ABSTRACT:
A method and system for manufacturing integrated circuit devices having multiple memory units embedded therein. Initially, a single reusable configurable test circuit is fabricated within an integrated circuit device. A number and type of each memory unit embedded within the integrated circuit device are then identified. Finally, the single reusable configurable test circuit is configured, in response to the identifying of a number and type of each memory unit, such that only one test circuit is required for use with multiple integrated circuit devices having multiple diverse memory units embedded therein. The single reusable configurable test circuit can be placed within or outside a fixed core of the integrated circuit device. In addition, the single reusable configurable test circuit can include array built-in self test (ABIST) controller which includes a hierarchical memory configuration that includes a state machine, address counter, compare register and data pattern generator.

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