Method and system for providing a restartable stop in a multipro

Details Method and system for providing a restartable stop in a multipro Method and system for providing a restartable stop in a multipro

1995-10-20

1997-10-14

Beausoliel, Jr., Robert W.

Boots, shoes, and leggings

395726, 3642302, 3642632, G06F 1100

Patent

active

056780036

ABSTRACT:
A multiprocessor system provides for a restartable stop condition that is fast and easily implemented. The multiprocessor system includes a plurality of processors. Each of the processors includes a bidirectional stop pin, which normally when asserted indicates that an error has been detected. Each of the plurality of processors also includes a scan port. The plurality of processors in the multiprocessor system are coupled together via their respective stop pins. By switching the stop pins to a different mode whereby an assertion of the pin causes the receiving processor to enter a restartable stop condition as a result of a restartable stop condition being achieved by the driving processor, the multiprocessor system can be quickly stopped. The restartable system stop technique when implemented utilizing a plurality of processors in which each of the processors include this stop pin provides both a straightforward and fast method for stopping a multiprocessor system in a restartable manner following the occurrence of any particular event. This commonly includes an instruction address breakpoint, single instruction step, data address breakpoint, or specific JTAG instruction. Memory coherency in the multiprocessor system is maintained throughout, such that functional clocks may be stopped, the machine state observed and restored in a non-destructive manner via scan, and functional clocks and code execution can then be restarted.

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