Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-08-22
2006-08-22
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180, C365S196000
Reexamination Certificate
active
07095654
ABSTRACT:
A multi-level non-volatile memory cell programming/lockout method and system are provided. The programming/lockout method and system advantageously prevent memory cells that charge faster than other memory cells from being over-programmed.
REFERENCES:
patent: 5095344 (1992-03-01), Harari
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5430859 (1995-07-01), Norman et al.
patent: 5570315 (1996-10-01), Tanaka et al.
patent: 5602987 (1997-02-01), Harari et al.
patent: 5657332 (1997-08-01), Auclair et al.
patent: 5663901 (1997-09-01), Wallace et al.
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5768191 (1998-06-01), Choi et al.
patent: 5774397 (1998-06-01), Endoh et al.
patent: 5890192 (1999-03-01), Lee et al.
patent: 5920507 (1999-07-01), Takeuchi et al.
patent: 5920508 (1999-07-01), Miyakawa et al.
patent: 5920509 (1999-07-01), Hirano et al.
patent: 5943260 (1999-08-01), Hirakawa
patent: 6046935 (2000-04-01), Takeuchi et al.
patent: 6151248 (2000-11-01), Harari et al.
patent: 6191977 (2001-02-01), Lee
patent: 6278632 (2001-08-01), Chevallier
patent: 6317364 (2001-11-01), Guterman et al.
patent: 6373746 (2002-04-01), Takeuchi et al.
patent: 6411551 (2002-06-01), Kim et al.
patent: 6426893 (2002-07-01), Conley et al.
patent: 6456528 (2002-09-01), Chen
patent: 6512263 (2003-01-01), Yuan et al.
patent: 6522580 (2003-02-01), Chen et al.
patent: 6538923 (2003-03-01), Parker
patent: 6836431 (2004-12-01), Chang
patent: 6958934 (2005-10-01), Fan et al.
patent: 2002/0008990 (2002-01-01), Satoh et al.
patent: 0 763 828 (1997-03-01), None
“Notification of Transmittal of the International Search Report or the Declaration,” corresponding PCT Application No. PCT/US02/37972, PCT International Searching Authority, Apr. 10, 2003, 6 pages.
European Patent Office, “Supplementary European Search Report”, from related European Patent Application No. 02794038.6, dated Oct. 28, 2005, 1 page.
Choi, Young-Joon, et al., “A High Speed Programming Scheme for Multi-Level NAND Flash Memory”, 1996 Symposium on VLSI Circuits Digest of Technical Papers, 1996 IEEE, Jun. 13, 1996, pp. 170-172.
Mak Alexander K.
Nguyen Khanh T.
Pan Feng
Pham Long C.
Quader Khandker N.
Nguyen N
Nguyen Tuan T.
Parsons Hsue & de Runtz LLP
SanDisk Corporation
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