Method and system for processing multiple requests for data resi

Details Method and system for processing multiple requests for data resi Method and system for processing multiple requests for data resi

1995-04-27

1997-10-21

Robertson, David L.

395478, 395420, G06F 1314

Patent

active

056805772

ABSTRACT:
A method and system for processing multiple requests for data residing at the same memory address. The multiple requests are associated with an individual duplicate bit flag that indicates whether the request can be processed. Thus, manipulation of the duplicate bit flag controls the order of processing for each of the received requests, thereby maintaining data coherency and integrity.

REFERENCES:
patent: 5197146 (1993-03-01), LaFetra
patent: 5226146 (1993-07-01), Milia et al.
patent: 5339397 (1994-08-01), Eikill et al.
patent: 5404482 (1995-04-01), Stamm et al.
IBM TDB "Force Purge Table for Memory Directory Based Symmetric Multiprocessor Systems", vol. 37 No. 08, Aug., 1994, pp. 293-294.

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