Multiplex communications – Wide area network – Packet switching
Patent
1995-05-24
1996-10-08
Kizou, Hassan
Multiplex communications
Wide area network
Packet switching
370 84, 370 856, 370112, H04L 1256, H04J 322
Patent
active
055638856
ABSTRACT:
A method and system for scheduling multiple channel data output. A multi-channel data processor stores ATM cells received from a network data input stream in channel FIFOs of a cell buffer. The input interval between cells received at a channel FIFO and the channel FIFO fullness is monitored to determine an optimum cell output interval for each channel. This optimum cell output interval is established such that the rate at which cells are output is substantially constant compared to the input cell rate and drives each channel FIFO fullness towards a nominal value. Optimum cell departure times are then calculated based on the optimum cell output interval for each channel. These optimum cell departure times are sorted and prioritized to create an overall optimum cell transmission schedule. By removing cells from channel FIFOs according to this optimal cell transmission schedule, data returns to the network having a restored temporal sequence in each channel without requiring embedded timing information. Establishing an output rate and sequence which optimizes FIFO fullness and minimizes gaps in the output data, also reduces buffering requirements for downstream network equipment.
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Kizou Hassan
Loral Fairchild Corporation
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