Patent
1997-01-13
1999-07-27
Teska, Kevin J.
395527, 395376, G06F 9455
Patent
active
059304952
ABSTRACT:
A method and system are disclosed in a first data processing system for processing a first instruction in response to an initiation of processing of a second instruction in an emulation environment. The first data processing system includes a first architecture, a first processing environment, and an emulation environment. The first instruction is executable within the first processing environment. The emulation environment is generated by the first architecture. The emulation environment emulates a second data processing system. The second data processing system includes a second architecture and a second processing environment. The second instruction is executable within the second processing environment. A file is established within the emulation environment. The file includes a plurality of routines. Each routine is associated with one of the second plurality of instructions. One of the routines is associated with the second instruction. The routine associated with the second instruction includes an indication of the first instruction and parameters associated with the second instruction. The emulation environment initiates processing of the second instruction, and thereby processes one of the routines. In response to the initiation, the processing of the second instruction by the emulation environment is temporarily halted. The routine associated with the second instruction invokes processing of the first instruction utilizing the parameters stored in the associated routine by the first processing environment.
REFERENCES:
patent: 3891974 (1975-06-01), Coulter et al.
patent: 4727480 (1988-02-01), Albright et al.
patent: 4951195 (1990-08-01), Fogg et al.
patent: 5113500 (1992-05-01), Talbott et al.
patent: 5167023 (1992-11-01), de Nicholas et al.
patent: 5297282 (1994-03-01), Meilak et al.
patent: 5333266 (1994-07-01), Boaz et al.
patent: 5347632 (1994-09-01), Filepp et al.
patent: 5373501 (1994-12-01), Roland
patent: 5379432 (1995-01-01), Orton et al.
patent: 5404529 (1995-04-01), Chernikoff et al.
patent: 5408622 (1995-04-01), Fitch
patent: 5423023 (1995-06-01), Batch et al.
patent: 5455951 (1995-10-01), Bolton et al.
patent: 5461475 (1995-10-01), Lerner et al.
patent: 5473777 (1995-12-01), Moeller et al.
patent: 5566326 (1996-10-01), Hirsch et al.
patent: 5652872 (1997-07-01), Richter et al.
patent: 5664159 (1997-09-01), Richter et al.
patent: 5737579 (1998-04-01), Kimura et al.
W.F. Beausoleil et al., "Fast Host Application Access to Local Area Network Server Files", IBM Technical Disclosure Bulletin, pp. 43-48, vol. 37, No. 1, Jan. 1994.
R.R. Heisch, "Power/PowerPC Binary Incompatibility Analyzer", IBM Technical Disclosure Bulletin, pp. 91-92, vol. 37 No. 9, Sep. 1994.
U. Bapst, "Arigo-A Peer-To-Peer Home Automation Network", IBM Technical Disclosure Bulletin, pp. 217-221, vol. 38, No. 9, Sep. 1995.
D. Obermann, "Design To Enable Locale Tagging for the Database Manager", IBM Technical Disclosure Bulletin, pp. 145-153, vol. 37, No. 1 Jan. 1994.
Christopher, Jr. Kenneth Walter
Jaramillo David
Snow Mary M.
Wahl Richard Dale
Winters Scott Lee
Dillon Andrew J.
Frejd Russell W.
Henkler Richard A.
International Business Machines - Corporation
Teska Kevin J.
LandOfFree
Method and system for processing a first instruction in a first does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for processing a first instruction in a first , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for processing a first instruction in a first will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-890014