Method and system for patterning to enhance performance of a met

Details Method and system for patterning to enhance performance of a met Method and system for patterning to enhance performance of a met

1997-09-25

2000-06-06

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

156345, 438720, 438736, 438742, H01L 2100

Patent

active

060718242

ABSTRACT:
A method and system for patterning a metal layer of a semiconductor device is disclosed. The method and system includes providing a material with an antireflective low dielectric constant hard mask layer (antireflective low k hard mask layer) on top of the metal layer, and providing a photoresist pattern on top of the anti-reflective low k hard mask layer. The method and system further includes etching of the anti-reflective low k hard mask layer and etching of the metal layer, wherein the photoresist is removed but the anti-reflective low k hard mask layer remains. In a preferred embodiment, the mask layer can also be applied at low temperatures (i.e., >300.degree.) to ensure that the physical properties of the integrated circuit are not affected. Finally, the low k material does not have to be removed after processing. Accordingly, through the use of an anti-reflective low k hard mask layer, the metal patterning can be more effectively accomplished in a deep submicron process, particularly a process that is required for 0.18 microns or smaller technologies.

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