Method and system for operating a comparator

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S166000

Reexamination Certificate

active

07570190

ABSTRACT:
A method and system for operating a comparator (602) is provided. The method includes analyzing an output (612) of the comparator (602) based on one or more of a transition of the output, present operational state of the comparator, and at least one time instant corresponding to the output. The method further includes controlling an operational state of the comparator (602) based on the analysis of the output (612).

REFERENCES:
patent: 5543793 (1996-08-01), Saiki
patent: 5883590 (1999-03-01), Sugden et al.
patent: 6792042 (2004-09-01), Bae
patent: 6965339 (2005-11-01), Midya et al.
patent: 7313005 (2007-12-01), Azuma et al.
patent: 2008/0048898 (2008-02-01), Miller et al.
Lukas Dörrer et al—“A 3mW 74dB SNR 2MHz CT ΔΕ ADC with a Tracking-ADC-Quantizer in 0.13 μm CMOS”—pp. 492-493, 612—Chapter 27.1 of ISSCC—Session 27—“Filters and Continous-Time ΔΕ Converters”—2005 IEEE—Int'l Solid-State Circuits Conference.

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