Method and system for multi-PHY addressing

Multiplex communications – Data flow congestion prevention or control – Flow control of data transmission through a network

Reexamination Certificate

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C231S004000, C231S004000

Reexamination Certificate

active

06930979

ABSTRACT:
Multi-PHY addressing from source to destination in which n-number of channels or ports are used in a PHY layer device for communication with a link layer device. A single link layer to a single-PHY layer topology and a single link layer to a multi-PHY layer topology comprising multiple ports or channels receives a plurality of channels groups. Status indication signal is provided on continuous basis for the direct status for up to a predetermined number of channels.

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Jay Sethuram, Richard J. Weber, Chandra S. Joshi; “Method And System For Source Synchronous Clocking;” filed Nov. 29, 1999; U.S. Appl. No. 09/450,802; including Specification: pp. 1-16; Drawings: Figures 1-5 on 5 sheets.

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