Data processing: structural design – modeling – simulation – and em – Modeling by mathematical expression
Reexamination Certificate
2000-04-07
2002-02-19
Teska, Kevin J. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Modeling by mathematical expression
C703S014000
Reexamination Certificate
active
06349272
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates generally to modeling systems having time varying elements, non-linear elements, or both types of elements and amongst other things to a method and system for generating reduced order models capable of being used in simulation of systems having time varying elements, non-linear elements, or both types of elements.
2. Background of the Invention
The increasing size, complexity, and integration level of wireless communications circuits makes accurate simulation of system level performance problematic. A challenging problem in the area of analog circuits is the simulation of clocked analog circuits like switching filters, switching power supplies, and phase-locked loops. These circuits are computationally expensive to simulate using conventional techniques because these kinds of circuits are all clocked at a frequency whose period is orders of magnitude smaller than the time interval of interest to the designer. Further, radio frequency circuits, mixed signal operation circuits and the like require modeling of not only analog circuits but the interaction of analog and digital circuits as systems and the interaction between the analog and digital circuits. These products require complex system-on-chip design and system integration, delivered in the tight and unforgiving time frames inherent to consumer markets. The realities of consumer-driven chip design and deployment are driving key considerations for designers, such considerations include that: (1) design costs and time are likely to dominate the decision-making process for system designers; (2) designs must be captured at the highest level of abstraction possible; (3) next-generation systems will need more medium-complexity systems than highly complex part types; and (4) chips will most likely be developed particular for platforms rather than being assembled from independently developed blocks of silicon functionality.
Model reduction refers to the procedure of automatic generation of system macromodels from detailed descriptions of circuits or systems. These macromodels can be used to perform rapid system level simulation of engineering designs that are too complicated to analyze at the detailed component level. The advantage of the reduction approach is that because the macromodels are generated from detailed physical descriptions of the system components, the influence of detailed physical effects can be included at the system level. Thus, an essential feature of reduction approaches is thorough control and assessment of approximation errors from formal analysis of the reduction algorithms. The problem of automated macromodel generation is interesting from the viewpoint of system level design because if small, accurate reduced order models of system component blocks can be extracted, then much larger portions of a design, or more complicated systems, can be simulated or verified than if the analysis were to have to proceeded at a detailed level. The prospect of generating the reduced model from a detailed analysis of component blocks is attractive because the influence of second order device effects or parasitic components on the overall system performance can be assessed. In this way overly conservative design specifications can be avoided.
There has been considerable recent interest, primarily in the context of simulation of electrical interconnect, in extracting low order models of lumped (often passive) components that are time invariant. There are many systems, however, that are not linear time-invariant (LTI) but can be accurately modeled as linear time varying (LTV). For example, if a nonlinear circuit model is linearized around a time-varying large signal, the resulting model is linear time-varying. In particular, many RF components (e.g., mixers and filters) are designed to have a near linear response in the signal path, but may have strongly nonlinear response to other excitations, such as the clock of a switched capacitor filter, or a mixer's local oscillator. RF circuits, which have a fundamental period, can be further classified as periodic time varying linear (PTVL) systems. Such components are prime candidates for LTV model reduction. From the above description, it can be seen that in the real world, the set of circuits that can be accurately modeled as LTV is much larger than the set that can be described as LTI.
Most of the recent work on LTI model reduction has been based, implicitly or explicitly, on projection-based formulations. The reduced model is obtained from the full model by projecting the linear system into a subspace of lower dimension. The subspace chosen determines the approximation properties of the reduced model.
It is now generally accepted that in LTI systems, choosing the projection subspaces to be Krylov subspaces is effective and efficient. The efficiency arises because the Krylov subspaces are easily computed. The effectiveness of the approach is motivated by noting that projecting into a Krylov subspace corresponds to matching derivatives of the Laplace-domain transfer function (the moments). Methods based on multipoint rational approximations are known to be particularly efficient. Unfortunately, however, model reduction for time-varying systems appears to have received little attention. Balanced truncation approaches have been proposed, but it is unclear how to implement these techniques effectively.
An additional problem in circuit design includes the modeling of interconnect and parasitic effects that are pervasive in all types of designs including digital, analog, and mixed signal designs. The computational cost due to the size and complexity of these circuit models is a major bottleneck in the verification of these designs. Therefore, a technique to provide accurate and compact macromodels of these interconnect and parasitic effects in circuits will improve upon the overall design cycle time.
Two recent trends in integrated circuit designs have brought out the importance of interconnect and parasitic effects in design verification: the evolution towards submicron designs and the rapid growth of telecommunication/RF circuit designs. The combination of high frequencies and high packaging densities in these designs has quickly increased the size as well as the complexity of the circuit models for circuit simulation and timing verification. Therefore, there is a need for a general tool to provide accurate and compact reduced order macromodeling of these linear circuit models to significantly improve the throughput of circuit simulation as well as timing verification, which in turn will improve the total design cycle time.
Presently, algorithms for reduction of large-scale linear systems have been projection-based approaches. Algorithms such as PVL, Arnoldi methods, and PRIMA obtain reduced models by projecting the linear equations describing the LTI model system into a subspace of lower dimension. The subspace chosen determines the approximation properties of the reduced model. Most of the popular algorithms exploit the connection between Krylov subspaces and rational approximation to develop algorithms that have a known relationship to the frequency-domain characteristics of the system, for example, matching the transfer function and some of its derivatives at various points in the complex plane. Linear reduction algorithms are useful for many problems, for example, simulation of electrical interconnect and analysis of noise in RF systems, but fail totally in other contexts. For example, adjacent channel power ratio “ACPR” is a figure of merit for the distortion properties of digitally modulated RF transmission systems and therefore by definition requires the utilization of nonlinear models. Microelectromechanical systems (“MEMS”) and power systems also require nonlinear macromodeling approaches. However, very few results are available for reduction of nonlinear systems.
SUMMARY OF THE INVENTION
In one embodiment, the present invention is directed toward a method for model reduction of systems that have time
Cadence Design Systems Inc.
Crosby, Heafey Roach & May
Teska Kevin J.
Thomson William
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