Method and system for minimizing the number of cycles required t

Details Method and system for minimizing the number of cycles required t Method and system for minimizing the number of cycles required t

1996-01-25

1998-03-24

Lim, Krisna

395384, G06F 930

Patent

active

057322350

ABSTRACT:
A system and method for reducing the cycle time necessary to execute semantic routines in a processor that emulates guest instructions. Each of the semantic routines includes a block of host instructions for performing the function of the corresponding guest instruction, and the last instruction in each of the semantic routines is a branch instruction. The method and system first determines the block length of each of the semantic routines. When a first guest instruction is encountered, the block of instructions in a first semantic routine corresponding to a guest instruction is executed. The block length of first semantic routine is then used to determine when to fetch a second semantic routine without fetching and decoding the branch instruction in the first semantic routine, thereby increasing emulation performance.

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IBM Technical Disclosure Bulletin, vol. 33 No. 11, Apr. 1991; pp. 66-69.

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