Data processing: structural design – modeling – simulation – and em – Modeling by mathematical expression
Reexamination Certificate
1999-07-20
2004-11-23
Phan, Thai (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Modeling by mathematical expression
C703S006000, C703S020000, C700S095000, C700S182000, C702S182000
Reexamination Certificate
active
06823294
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to circuit design productivity management. More specifically, the present invention relates to a method and system for measuring the output of integrated circuit design projects to permit the measurement and comparison of design team performance.
2. Description of Related Art
Integrated circuits are becoming increasingly complex to design, and the difficulty of completing circuit design projects on time is rising as a consequence. Rapid delivery of newly designed products to the market is one of the most competitive factors in the electronics industry. It can therefore be of critical importance to circuit designers and manufacturers to determine the effort that is required to design a target circuit. Such a determination can promote the efficient allocation of personnel and resources, and can permit the identification of inefficiencies within the design process. However, it is extremely difficult to assess the complexity of a target circuit and accordingly the amount of effort required to design it.
A circuit is a term that is used to describe a collection of electronic components that perform a particular function. An integrated circuit is a circuit manufactured on a single semiconductor substrate comprising transistors, resistors, capacitors, and other circuit elements. Conventional CMOS integrated circuits generally comprise extremely large numbers of transistors and rarely contain other types of circuit elements.
In a typical integrated circuit design project, a logic design is created and then translated into sets of geometric patterns which are used to fabricate the physical integrated circuit device. The effort required in each stage of circuit design and implementation can vary due to such factors as the number of transistors and types of circuits in the design. Because circuits can have widely varying functions and numbers of transistors, it has not been possible to easily determine if an integrated circuit has been efficiently developed.
In the prior art, attempts have been made to determine metrics and units of measurement for the outcome of integrated circuit development projects. An example of such an attempt is a study by Marco lansiti, published in Harvard Business School Press “Technology Integration”, 1998, p. 57, that cites transistor density (transistors per square millimeter) as the central measurement of project performance. All other differences in product complexity were addressed by comparing design projects within certain categories such as DRAM or microprocessor. Project efficiency was then evaluated by directly comparing time and effort consumed in the development process, after adjusting for transistor density.
Researchers have attempted to define complexity measures for computer software programs. For example, in “Elements of Software Science,” 1977 New York: Elsevier, M. H. Halstead uses the length of a program in lines of code to define its complexity. T. J. McCabe characterizes a program's complexity by measuring the number of control paths it contains, as explained in “A Complexity Measure,”
IEEE Transactions on Software Engineering,
vol. SE-2, December, 1976. Such measures of complexity are used today to improve software quality and to manage software engineering productivity.
Density and transistor count have been recognized as being important factors in assessing circuit design productivity. However, additional circuit design factors such as circuit type and design reuse have not been taken into account in the prior art.
It would therefore be an advantage to provide a method for comparing different circuit designs based on their complexity and for measuring complexity in a consistent way. It would be a further advantage if such method were available to permit both historical and predictive analyses of circuit design projects.
SUMMARY OF THE INVENTION
The present invention provides a method and system for measuring circuit design complexity. The intrinsic complexity of an integrated circuit design can be measured and expressed as a single numeric value that can be used to represent the results produced by a design team. Historical and predictive analyses of circuit design projects can thereby be provided.
The present invention can be used to derive conclusions regarding the time and effort required to implement a target circuit design. These conclusions can then be used to allocate personnel or funding to the target circuit design project, implement procedural changes to improve design efficiency, or to prepare a bid for the project. A report can also be generated to estimate the amounts of time, effort, and personnel required to accomplish a proposed circuit design project.
The preferred embodiment of the present invention comprises five components. The Normalization Method is used to enable the comparison of heterogeneous designs and the calculation of certain Design Capability Metrics. The Design Capability Metrics are used to enable management decision-making. The design data and performance measurements are stored in the Design Project Database. This data can then be used to produce a Project Performance Assessment and/or a Best Practice Analysis. Software tools can also be used to streamline and standardize data collection.
In the Normalization Method according to the present invention, a normalized transistor count is determined by adjusting the actual transistor count based upon the composition of the design, or the degree to which certain types of circuits are present or absent from the design, as well as based upon the values of certain attributes which are common to all designs. Two types of complexity factors are identified and used to adjust transistor count—circuit composition factors, and attribute figure of merit factors.
A Design Project Database (“database”) of integrated circuit design project data provides the raw data from which the appropriate complexity factors are identified. Tests of significance can be applied to this data using standard statistical analysis to identify factors that significantly impact project effort. These factors are then incorporated into a Normalization Equation in such a way that normalized transistor count is a statistically significant predictor of required design project effort.
The Normalization Equation comprises a series of multiplicative terms, each of which represents either a circuit composition factor or an attribute figure of merit factor. Terms that represent circuit composition factors are expressed mathematically as the sum of fractional portions of the design, each with a weighting coefficient that reflects the relative difficulty of implementing the portion. Terms that represent attribute figure of merit factors are expressed mathematically as an exponential. The exponent is the standard residual of the figure of merit factor multiplied by a coefficient that reflects the maximum impact the term can have on normalized transistors. The Normalization Equation can be modified over time as the complexity of integrated circuit design changes, for example, by adding and deleting terms.
Coefficients required in the terms of the Normalization Equation are derived from empirical data captured in the database. Two methods may be used to calculate the coefficients. In the first method, effort is compared among projects in which only the factor under study varies and all other factors remain constant. Variation in effort is associated with variations in the value of the factor. From this relationship, the coefficients may be determined.
In the second method, a large sample of design project data is required, but coefficients may be accurately determined from full-project data. A series of steps involving multiple regression analysis and factor analysis is used to isolate the effects of individual complexity factors on project effort.
REFERENCES:
patent: 5655074 (1997-08-01), Rauscher
patent: 5655110 (1997-08-01), Krivokapic et al.
patent: 5691909 (1997-11-01), Frey et al.
patent: 5822218 (1998-10-01
Collett International, Inc.
Dergosits & Noah LLP
Nebb Richard A.
Phan Thai
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