Method and system for low noise amplifier (LNA) and power...

Details Method and system for low noise amplifier (LNA) and power... Method and system for low noise amplifier (LNA) and power...

2007-03-27

2007-03-27

Pascal, Robert (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including gain control means

C330S289000, C330S278000

Reexamination Certificate

active

10977798

ABSTRACT:
Methods and systems for processing signals are disclosed herein. In one aspect of the invention a circuit for processing signals may comprise a triple well (TW) NMOS transistor coupled to an amplifier core. The TW NMOS transistor may track process and temperature variations (PVT) of at least one NMOS transistor within the amplifier core. A drain of the TW NMOS transistor may be coupled to a first inductor and the first inductor may be coupled to a first voltage source. The first voltage source may generate a standard voltage of about 1.2V. A source of the TW NMOS transistor may be coupled to a second inductor and the second inductor may be coupled to the first voltage source. A gate of the TW NMOS transistor may be coupled to a second voltage source, where the second voltage source may generate a standard voltage of about 2.5V.

REFERENCES:
patent: 6426680 (2002-07-01), Duncan et al.
patent: 6583671 (2003-06-01), Chatwin
patent: 6819180 (2004-11-01), Krvavac
patent: 6917081 (2005-07-01), Ueda et al.

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