Method and system for inspecting semiconductor memory device

Details Method and system for inspecting semiconductor memory device Method and system for inspecting semiconductor memory device

1997-04-23

1998-06-23

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular connection

365201, 371 211, G11C 2900

Patent

active

057711917

ABSTRACT:
A method for inspecting a semiconductor memory device by using an inspection microcomputer and a memory for storing a test program for the inspection. The semiconductor memory device includes a non-volatile memory area, a peripheral circuit thereof, a control circuit for controlling writing and erasing of data to and from the non-volatile memory area via the peripheral circuit, and a control bus for connecting the control circuit and the peripheral circuit. The method includes the steps of: deactivating the control circuit; connecting the inspection microcomputer and the memory to the control bus; and inspecting the peripheral circuit and the non-volatile memory area by the inspection microcomputer.

REFERENCES:
patent: 5371748 (1994-12-01), Saw et al.
patent: 5627838 (1997-05-01), Lin et al.
patent: 5689635 (1997-11-01), Petrosino
patent: 5694611 (1997-12-01), Matsubara

Affiliated with

Also associated with

Rating

Method and system for inspecting semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for inspecting semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for inspecting semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1399198