Data processing: software development – installation – and managem – Software program development tool – Translation of code
Reexamination Certificate
1997-05-01
2001-09-18
Powell, Mark R. (Department: 2122)
Data processing: software development, installation, and managem
Software program development tool
Translation of code
C717S152000, C717S152000
Reexamination Certificate
active
06292934
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to a method of and a system for optimizing a computer program and, more particularly, to a method of and a system for improving the locality of memory references during execution of a computer program.
BACKGROUND OF THE INVENTION
Many conventional computer systems utilize virtual memory. Virtual memory refers to a set of techniques that provide a logical address space that is typically larger than the corresponding physical address space of the computer system. One of the primary benefits of using virtual memory is that it facilitates the execution of a program without the need for all of the program to be resident in main memory during execution. Rather, certain portions of the program may reside in secondary memory for part of the execution of the program. A common technique for implementing virtual memory is paging; a less popular technique is segmentation. Because most conventional computer systems utilize paging instead of segmentation, the following discussion refers to a paging system, but these techniques can be applied to segmentation systems or systems employing paging and segmentation as well.
When paging is used, the logical address space is divided into a number of fixed-size blocks, known as pages. The physical address space is divided into like-sized blocks, known as page frames. A paging mechanism maps the pages from the logical address space, for example, secondary memory, into the page frames of the physical address space, for example, main memory. When the computer system attempts to reference an address on a page that is not present in main memory, a page fault occurs. After a page fault occurs, the operating system copies the page into main memory from secondary memory and then restarts the instruction that caused the fault.
One paging model that is commonly used is the working set model. At any instance in time, t, there exists a working set, w(k, t), consisting of all the pages used by the k most recent memory references. The operating system monitors the working set of each process and allocates each process enough page frames to contain the process' working set. If the working set is larger than the allocated page frames, the system will be prone to thrashing. Thrashing refers to very high paging activity in which pages are regularly being swapped from secondary memory into the pages frames allocated to a process. This behavior has a very high time and computational overhead. It is therefore desirable to reduce the size of (i.e., the number of pages in) a program's working set to lessen the likelihood of thrashing and significantly improve system performance.
A programmer typically writes source code without any concern for how the code will be divided into pages when it is executed. Similarly, a compiler program translates the source code into relocatable machine instructions and stores the instructions as object code in the order in which the compiler encounters the instructions in the source code. The object code therefore reflects the lack of concern for the placement order by the programmer. A linker program then merges related object code together to produce executable code. Again, the linker program has no knowledge or concern for the working set of the resultant executable code. The linker program merely orders the instructions within the executable code in the order in which the instructions are encountered in the object code. The computer program and linker program do not have the information required to make an optimal placement of code portions within an executable module. This is because the information required can only be obtained by actually executing the executable module and observing its usage of code portions. Clearly this cannot be done before the executable module has been created. The executable module initially created by the compiler and linker thus has code portions laid out without regard to their usage.
As each code portion is executed, the page in which it resides must be in physical memory. Other code portions residing on the same page will also in memory, even if they may not be executed in temporal proximity. The result is a collection of pages in memory with some required code portions and some unrequited code portions. To the extent that unrequired code portions are loaded into memory by this process, valuable memory space is wasted, and the total number of pages loaded into memory is much larger than necessary.
SUMMARY OF THE INVENTION
In a preferred embodiment, the present invention provides a method and system for determining an optimal placement order for basic blocks within a computer program to improve locality of reference and reduce the working set of the computer program. By reducing the working set, the computer program requires less memory than it normally would require to execute on a computer system. According to the present invention, the optimal placement order for basic blocks within a computer program reflects the concurrency of usage for basic blocks during execution of the computer program. The method for determining an optimal placement order includes analyzing the computer program in machine code format to identify all of the basic blocks, determining how many times each basic block is executed, assigning a placement order to each basic block depending upon how many times each basic block was executed, and reordering the basic blocks according to their assigned placement orders to produce an optimized computer program.
To identify all of the basic blocks that make up the computer program, the present invention first gathers known instruction addresses from available sources such as program entry points, export entry tables, symbolic debug information, and even user input. The present invention then disassembles the instructions at these addresses and identifies all basic blocks that are encountered during the disassembly process. After identifying all basic blocks that are encountered during the disassembly process, the present invention processes jump tables to identify more instruction addresses. A jump table is a table of addresses that are destinations of a transfer instruction that indexes into the jump table. The present invention processes jump tables in a breadth-first manner, that is, the first entry in every jump table is processed before the second or subsequent entries in any jump table. After identifying more instruction addresses while processing jump tables, the present invention then disassembles the instructions at these addresses and identifies all basic blocks that are encountered during the disassembly process.
The present invention further optimizes a computer program by replacing rarely executed instructions with other instructions that require a smaller amount of storage space. For example, a conditional branch instruction typically occupies 5-6 bytes of storage space, while a conditional branch-to-self instruction typically occupies 2 bytes of storage space. After using the previously-described methods to identify and separate frequently executed code blocks from rarely executed code blocks, conditional branches from the frequently executed code blocks to the rarely executed code blocks may be identified and replaced by conditional branch-to-self instructions. For each replacement, a savings of 3-4 bytes of storage space is realized. The execution of a conditional branch-to-self instruction results in an execution of an “infinite loop” when the condition is met (i.e., transfer to a rarely executed code block). A monitor process detects when a program is executing such an infinite loop and causes the program to branch to the rarely executed code.
REFERENCES:
patent: 4047243 (1977-09-01), Dijkstra
patent: 4642765 (1987-02-01), Cocke et al.
patent: 4656583 (1987-04-01), Auslander et al.
patent: 4731740 (1988-03-01), Eguchi
patent: 4763255 (1988-08-01), Hopkins et al.
patent: 4868738 (1989-09-01), Kish et al.
patent: 5212794 (1993-05-01), Pettis et al.
patent: 5274811 (1993-12-01), Borg et al.
patent: 5313616 (
Apperson Norman Eugene
Davidson Robert I.
Myhrvold Nathan
Shupak Richard
Vogel Keith Randel
Merchant & Gould
Microsoft Corporation
Powell Mark R.
Zhen Wei
LandOfFree
Method and system for improving the locality of memory... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for improving the locality of memory..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for improving the locality of memory... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2550001