Information security – Access control or authentication – Network
Reexamination Certificate
2007-03-20
2007-03-20
Sheikh, Ayaz (Department: 2136)
Information security
Access control or authentication
Network
C726S014000, C713S153000
Reexamination Certificate
active
09880701
ABSTRACT:
A packet processing system is embodied on an ASIC is optimized for processing IPSec security protocol packets in a hardware configuration. Embedded RISC processors operate with hardware support modules providing for IPSec packet processing at OC24 data rates and greater. IPSec packets are received through a streaming interface and buffered in an external memory. When the entire packet is in external memory, portions are buffered in a local memory for crypto-processing. As portions of the packets complete processing, the portions are buffered to an output portion of the external memory associated with the channel. When an entire packet competes processing, portions are buffered to a local memory for streaming. The hardware accordingly reduces the involvement of the RISC processors and significantly increases channel throughput providing for high-speed IPSec packet processing.
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International Search Report mailed Oct. 17, 2002 form European Patent Office for counterpart PCT application No. PCT/US02/19079.
Anand Satish
Cassetti David
Mercer Chad W.
Noehring Lee P.
Privett Michael
Corrent Corporation
Ingrassia Fisher & Lorenz
Parthasarathy Pramila
Sheikh Ayaz
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