Method and system for hardware accelerator for implementing...

Details Method and system for hardware accelerator for implementing... Method and system for hardware accelerator for implementing...

2011-01-11

2011-01-11

Cervetti, David Garcia (Department: 2436)

Cryptography

Particular algorithmic function encoding

C380S044000, C380S037000, C380S268000, C713S176000

Reexamination Certificate

active

07869590

ABSTRACT:
In a wireless communication system, a method and system for a hardware accelerator for implementing the f9 integrity algorithm in WCDMA compliant handsets are provided. Intermediate variables may be initialized in an integrity function and a first processing block of bits and at least one additional processing block of bits may be generated for the integrity function from a padded string generated from input variables. Values for a first and a second processing variable may be generated for each processing stage based on a corresponding processing block of bits and on immediately generated previous first and second processing values. The first processing value may be generated utilizing a KASUMI operation after an indication that an immediately previous generated first processing value is available. An authentication code may be generated based on a last of the second processing values and a modified integrity key.

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3rdGeneration Partnership Project, “3GPP, Technical Specification Group Services and System Aspects, 3G Security, Specification of the 3GPP Confidentiality and Integrity Algorithms, Document 1: f 8 and f 9 Specification (release 5)”, 3GPP TS 35.201 v 5.0.0 Jun. 2002, pp. 1-22.
3rdGeneration Partnership Project, “3GPP, Technical Specification Group Services and System Aspects, 3G Security, Specification of the 3GPP Confidentiality and Integrity Algorithms, Document 2: KASUMI Specification (Release 5)”, 3GPP TS 35.202 v 5.0.0 Jun. 2002, pp. 1-24.

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